Memory

Micron Announces Shift in High-Performance Memory Roadmap Strategy

By Andreas Schlapka - 8.28.18

HMC

Last week, Micron announced a change in its strategy for high-performance memory solutions, moving away from Hybrid Memory Cube (HMC) and focusing on the next-generation of high-performance compute and networking solutions.

As a technology leader, Micron has traditionally partnered with like companies to pioneer performance memory solutions. This partnership requires technical expertise and market understanding to collaborate with consortiums to seed new ideas. Hybrid Memory Cube (HMC) was a good example of Micron’s creativity, energy and effort that delivered off-the-shelf performance memory.

HMC represented a new way of thinking to adopt technology like SERDES, and leverage packet transfer protocol that was valued in many applications. It was truly novel in the implementation of a memory solution to deliver performance.

The success of HMC is apparent by the wide adoption across a variety of technology industries. This includes:

  • futuristic applications in data science as exemplified by the Square Kilometer Array (SKA) program,
  • unparalleled high-performance compute (HPC) solutions from companies such as Fujitsu(PRIMEHPC FX100),
  • delivering 400G and beyond in high-performance network routers and data center switches, such as Juniper and other networking customers.

HMC enablement required developing a supportive ecosystem, where academia such as the University of Heidelberg created the openHMC IP, enabling FPGA-based designs to become a reality. Collaboration of Industry leaders co-developed multiple specifications of HMC through the open Hybrid Memory Cube Consortium (HMCC). The value of this teamwork and engagement should continue to harness the creativity to deliver new technology to solve future market requirements.

Now, as the volume projects that drove HMC success begin to reach maturity, at Micron we are now turning our attention to the needs of the next generation of high-performance compute and networking solutions. We continue to leverage our successful Graphics memory product line (GDDR) beyond the traditional graphics market and for extreme performance applications, Micron is investing in HBM (High-Bandwidth Memory) development programs which we recently made public.

Leading in technology is a core part of the Micron philosophy and engaging in and with consortiums, like the HMCC, is ingrained in our culture. This exploratory work develops our learning and nurtures deep customer relationships as we search for solutions to our customers’ most critical challenges.

Stay tuned for exciting announcements on the next stretch of our road(map).

Amit Gattani

Andreas Schlapka

Dr. Andreas Schlapka is the Director of Networking in Micron Technology's Compute and Networking Business Unit. Dr. Schlapka joined Micron in 2009 and is responsible for the worldwide management of strategic and operational activities related to the Networking business segment. Prior to Micron, Dr. Schlapka was Head of Global Product Marketing for PC Memory at Qimonda AG and also served in various management roles at Infineon AG. Dr. Schlapka holds a PhD in Physics from the Technical University of Munich and a MSc in Physics from the University of York.

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