The evolution of NAND

Micron Technology | March 2018

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It is somewhat difficult to relate how changes in memory technology might impact you in everyday life. In this blog post I want to take the opportunity to shed some light on how the most recent advancements in NAND technology from Micron help satisfy the human element of ever-increasing storage needs. Micron’s recent announcement of the industry first 64 layer 3D NAND enterprise SSD could lead you to wonder ‘why is 64 layer 3D NAND such a big deal?’

The development of 64 layer 3D NAND means 64 gigabytes of storage in a single memory chip. This can mean many different things depending on the perspective we apply when evaluating the impact. To the people taking selfies that can mean over 9,000 pictures that get posted on social media, 10 hours of high definition video documenting happy memories for families, or over 15,000 songs to keep the music playing as we move through day to day life. 

3D NAND is a revolutionary storage technology that allows 64GB of storage to fit in a package smaller than your fingernail.  This is truly amazing when we consider the first NAND-based USB drives that came to market in 2000 measured density in megabytes (MB). In less than 20 years, the industry has seen tremendous advances in technology and now measures USB flash drives in TBs rather than MBs. For many years the industry pushed up storage density and pushed down the cost per GB of that storage by shrinking the width of the electrical circuitry in each generation (measured in nanometers – billionths of a meter). As the scaling limitations in ever-shrinking lithography were realized, leaders in industry needed a new way to grow the density of each device while also reducing relative cost per GB. The most recent catalyst in NAND technology to achieve this has been the implementation of 3D stacking technologies that allow for figurative skyscrapers of storage to be layered one on top of another.

Speaking in real estate terms, in order to enable a denser population of people per acre, the method has changed from shrinking the streets to build more houses on the block into building skyscrapers of housing.  Also, to continue to improve NAND designs, new ways of architecting the logic or periphery were introduced in 3D NAND products. Known most commonly as “CMOS under the array”, Micron has added this technology to our 3D NAND which has emerged as a key factor in having one of the most dense and efficient GBs per MM^2 available on the market today. Much like modern subway systems that are critical to moving people around in big cities, Micron has utilized the space under the storage array to shrink the total physical dimensions needed to store more bits per piece of silicon.

Last but certainly not least, one of the critical performance metrics that is consistently measured in various NAND devices is programming throughput, measured in MB/s per second. To improve performance in this regard, Micron is working on a quad plane NAND architecture that gives the host the ability to program the device very efficiently bringing the data throughput up. If the NAND device was analogous to a car wash and the numbers of planes were equivalent to the number of wash bays available to move cars in and out, Micron has added more bays with the additional planes in these NAND designs. In either case, more bays on a car wash or more planes on a NAND, this is a logical way to increase your throughput of cars through the wash or data through a NAND.

nand evolution

With the ever-increasing need for storage in personal, professional, mobile and datacenter applications, there is little doubt that technology will continue to evolve in the future to meet market needs. Micron will continue to find innovative ways to increase the storage capacity of NAND, improve the performance of each device, and introduce features that will expand the effective implementation of NAND. That said, it is still profound to reflect on where we have been, what is capable with the technologies of the day, and the underlying advancements that enable each incremental selfie.