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Your Innovation, Our Memory

Your Innovation, Our Memory

Emerging technologies require innovation on a whole new scale. See how we partner closely with our customers to gain unique insights about how we can optimize our memory solutions to enable your innovations—and help you change the world.

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Memory for Automotive

Memory for Automotive

Technology is reshaping the concept of driving. Automakers are developing countless new driver-assistance features and systems. See how Micron’s memory solutions are helping to enable these new supercomputing capabilities.

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About Micron

Where there's memory, there's Micron

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For more than 30 years Micron has redefined innovation by designing, developing, and manufacturing some of the world’s most advanced technologies.

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Elpida is Now Micron

Elpida Is Now Micron

With the combined strength of our products, technology, and team members—our customers now have access to the broadest portfolio of best-in-class technology.

About the acquisition

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DDR4—Packing Power and Performance into a New Generation

DDR4 is the newest iteration in DRAM, loaded with new features that improve reliability, speed, power, and stacking capabilities for the enterprise, micro-server, ultrathin, and tablet markets. With data rates reaching 2400 Mb/s, DDR4 increases performance up to 50% over DDR3. DDR4 also delivers a 20% reduction in voltage over DDR3—however, when DDR4’s additional power-saving features are taken into account, total overall power savings versus DDR3 can be as much as 40%.

The new boundary scan feature (also known as JTAG) enables early fault detection during testing, thereby reducing debugging time, improving system reliability, and ultimately, saving development and production costs.

Density Width Voltage Clock Rate Package Op. Temp.

4Gb

See 6 Products
x4, x8, x16 1.2V 1067 MHz, 1200 MHz, 1600 MHz FBGA 0C to +95C

8Gb

See 1 Products
x4 1.2V 1067 MHz FBGA 0C to +95C
  • Improved performance—up to 50% higher than DDR3
  • Improved power consumption—up to 40% lower than DDR3
  • Higher data rates—2400 MT/s at release
  • Faster burst accesses
  • Improved data signal integrity
  • Higher-capacity memory subsystem, with up to 8-die stacking
  • Early fault detection and improved system reliability through JTAG

Featured Article

System Power Calculators

System Power Calculators

Whether it's calculating battery life for a portable application, planning cooling for a desktop, or determining the power supply for a server, an accurate power budget for the memory is essential.

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DDR2 to DDR3

DDR3 to DDR4

Next-generation, high-performance DDR4 pushes the envelope in key areas like power consumption, signaling speeds, and bandwidth and brings new levels of performance to desktop, notebook, and server computing applications.

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For DDR4 SDRAM (2)
Title & Description Secure ID# Updated Type
Technical note: Using DDR4 in Networking Subsystems: (PDF 522.69 KB)This technical note focuses on using DDR4 in networking subsystems. It highlights the main benefits of DDR4 devices, as well as some of the constraints, to help system designers maximize the performance of their memory subsystems. TN-40-03 02/2014 Technical Note
Why DRAM for Ultrathins: (PDF 64.92 KB)Micron’s DRAM portfolio is the industry’s broadest and includes every type and form factor used in today’s ultrathin and Ultrabook designs. 02/2013 Product Flyer
For DRAM (16)
Title & Description Secure ID# Updated Type
DRAM Component Part Numbering System: (PDF 45.91 KB)Part numbering guide for DDR4/DDR3/DDR2/DDR/SDR SDRAM, Mobile LPDRAM, and RLDRAM components 06/2014 Part Numbering Guide
Legacy LPDRAM Part Numbering System: (PDF 114.47 KB)Part numbering guide for legacy LPDDR2 and LPDRR3 PoP and FBGA components 05/2014 Part Numbering Guide
SEMI Wafer Map Format: (PDF 114.26 KB)Micron has adopted the wafer map file format approved by Semiconductor Equipment and Materials International (SEMI). With SEMI formatting, Micron's customers can be confident they will always receive consistent, compatible, reliable map files. TN-00-21 03/2014 Technical Note
HMC Part Numbering System: (PDF 58.88 KB)Part numbering guide for Hybrid Memory Cube 01/2014 Part Numbering Guide
Routing Guidelines for Micron’s HMC-15G-SR: (PDF 3.3 MB)Provides sound methods, proven solutions, and detailed PCB layout guidelines to enable successful designs using Micron’s HMC. TN-43-03 HMC TN-43-03 06/2013 Technical Note
Recommended Soldering Parameters: (PDF 173.37 KB)Defines the recommended soldering techniques and parameters for Micron Technology, Inc., products. TN-00-15 12/2012 Technical Note
Bypass Capacitor Selection for High-Speed Designs: (PDF 481.9 KB)Describes bypass capacitor selection for high-speed designs. TN-00-06 03/2011 Technical Note
Micron Wire-Bonding Techniques: (PDF 66.13 KB)This technical note provides guidance on wire bonding techniques for both nickel-palladium (NiPd) and aluminum (Al) bond pads on Micron products. TN-00-22 11/2010 Technical Note
Uprating of Semiconductors for High-Temperature Applications: (PDF 428.33 KB)Describes the issues associated with temperature uprating and the risks involved in using components and/or systems outside the manufacturer's environmental specifications TN-00-18 05/2010 Technical Note
Accelerate Design Cycles with Simulation Models: (PDF 206.91 KB)Micron supplies the tools and guidelines necessary to verify new designs prior to layout. This technical note discusses software model support, signal integrity optimization, and logic circuit design. TN-00-09 02/2010 Technical Note
The Future of Memory and Storage: (PDF 1.54 MB)Overview of trends for main memory and Flash memory 12/2009 Presentation
Understanding Signal Integrity: (PDF 1.64 MB)Describes how memory design, test, and verification tools can be used to the greatest advantage, from conception of a new product through end of life TN-00-20 12/2009 Technical Note
IBIS Behavioral Models: (PDF 163.98 KB)Micron has been a member of the IBIS Open Forum for many years and fully supports the IBIS specification. IBIS models for most Micron products are available for download from the Micron Web site. TN-00-07 11/2009 Technical Note
Understanding Quality and Reliability Requirements for Bare Die Applications: (PDF 142.04 KB)Describes the quality and reliability requirements for bare die applications TN-00-14 10/2009 Technical Note
FBGA Date Codes: (PDF 22.36 KB)Date codes for FBGA-packaged components 08/2005 Part Numbering Guide
FBGA Decoder: Micron's FBGA Part Marking Decoder makes it easier to understand part marking. Tool
For Products and Support (14)
Title & Description Secure ID# Updated Type
Product Marks/Product and Packaging Labels: (PDF 1.46 MB)Explains product part marking, and product and packaging labels. CSN-11 07/2014 Customer Service Note
Shipping Quantities: (PDF 1.22 MB)Provides standard part quantities for shipping. CSN-04 03/2014 Customer Service Note
RMA Procedures for Packaged Product and Bare Die Devices: (PDF 76.22 KB)Outlines standard returned material authorization (RMA) procedures, as well as the differences associated with bare die RMAs. CSN-07 01/2014 Customer Service Note
Wafer Packaging and Packaging Materials: (PDF 591.42 KB)Provides complete shipping and recycling information about each of the materials used for shipping Micron's products. CSN-20 11/2013 Customer Service Note
Thermal Applications: (PDF 246.79 KB)Describes some considerations in thermal applications for Micron memory devices TN-00-08 07/2013 Technical Note
Moisture Absorption in Plastic Packages: (PDF 97.08 KB)Describes shipping procedures for preventing memory devices from absorbing moisture and recommendations for baking devices exposed to excessive moisture TN-00-01 02/2013 Technical Note
Micron Component and Module Packaging: (PDF 1.41 MB)Explanation of Micron packaging labels and procedures. CSN-16 01/2013 Customer Service Note
Micron BGA Manufacturer's User Guide: (PDF 388.76 KB)Provides information to enable customers to easily integrate both leading-edge and legacy Micron's ball grid array (BGA) packages into their manufacturing processes. It is intended as a set of high-level guidelines and a reference manual describing typical package-related and manufacturing process-flow practices. CSN-33 12/2012 Customer Service Note
Electronic Data Interchange: (PDF 52.45 KB)Describes EDI transmission sets, protocol, and contacts. CSN-06 11/2012 Customer Service Note
PCN/EOL Systems: (PDF 79.21 KB)Explains Micron's product change notification and end-of-life systems. CSN-12 04/2012 Customer Service Note
Lead Frame Package User Guidelines: (PDF 245.66 KB)Discusses Micron's lead-frame package options CSN-30 05/2011 Customer Service Note
ESD Precautions for Die/Wafer Handling and Assembly: (PDF 120.81 KB)Describes the benefits of controlling ESD in the workplace, including higher yields and improved quality and reliability, resulting in reduced manufacturing costs. CSN-24 08/2010 Customer Service Note
Micron KGD Definitions: (PDF 65.52 KB)Describes the testing specifications and parameters for Micron's KGD-C1 and KGD-C2 DRAM die. CSN-22 07/2009 Customer Service Note
Bare Die SiPs and MCMs: (PDF 151.06 KB)Describes design considerations for bare die SiPs and MCMs. CSN-18 04/2009 Customer Service Note

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DDR4 SDRAM FAQs (16)

What is DDR4’s VPP supply, and why does DDR4 have it?

The VPP supply replaces the internal word-line charge pumps. Providing this voltage externally allows the DDR4 to operate at a lower voltage level in a more cost-effective manner rather than providing the internal charge pumps.

Are DDR3 and DDR4 pin-to-pin compatible to each other?

No, the DDR4 ballout is different from the DDR3 ballout. However, DDR4 uses the same package sizes and ball pitch as DDR3.

Does DDR4 use the same signaling protocol as DDR3?

DDR4 uses the same VTT mid-point termination methodology (SSTL1.5) on the address, command, and control pins as DDR3; however, DDR4 uses VDD termination (POD12) on the data bus due to the use of pseudo open-drain I/Os for improved signal quality and less switching current.

Does DDR4 use the same power sources as DDR3?

No, DDR3 requires VDD and VDDQ equal to 1.5V, VREFCA equal to 0.5 x VDD, and VREFDQ equal to 0.5 x VDDQ, while DDR4 requires VDD and VDDQ equal to 1.2V, VREFCA equal to 0.5 x VDD, and VPP equal to 2.5V.

Are there any new inputs/outputs required to support DDR4?

Yes, seven new inputs/outputs were added: VPP, BG (bank group), DBI_n, ACT_n, PAR, Alert_n, and TEN. However, the ball count increased by only three (73 to 76 balls).

Does DDR4 support DLL off mode for very slow clock rates?

Yes, DDR4 supports DLL-off mode similar to DDR3, up to 125 MHz.

DDR4 doubled the data rate of DDR3—did the prefetch also double from 8n to 16n?

No, DDR4 kept the 8-bit prefetch used by DDR3; thus, BL8 is still supported.

Did DDR4 finally add boundary-scan or JTAG support?

For x16 devices, yes; DDR4 added a “connectivity test” mode that allows electrical verification of balls after connection to a memory interface.

Can DDR4 operate at slower DDR3 speeds?

DDR4 is backward compatible as far back as DDR3-1333. For systems that do not need speed increases above DDR3-1333 and DDR3-1600, DDR4 can support these slower bandwidth requirements with substantially lower power requirements.

Will DDR4 be a replacement for your DDR3 offering?

Just as DDR2 transitioned to replace DDR memory, and DDR3 transitioned to replace DDR2 memory, DDR4 will also transition to replace DDR3 memory as the volume commodity DRAM. We expect industry DDR3 to DDR4 crossover to occur in the 2015 timeframe. For designs that cannot afford a re-spin to DDR4 SDRAM, we expect to still provide DDR3 SDRAM as DDR3 enters the legacy support phase. In the meantime, DDR4 is a great alternative for systems needing power savings or a performance bump from DDR3; every new memory design should at least adopt DDR4 support.

What are some of the additional power-saving features of DDR4?

Some new power-savings features in DDR4 include pseudo open-drain DQs (for read and write I/O power reduction), data-bit inversion (DBI), and command address latency (CAL).

What is the value of DDR4?

DDR4 has more than 20 new features compared to DDR3—multiple power-saving, performance, and reliability features. These features, coupled with DDR4’s 1.20V core, can provide as much as 40% power savings compared to standard DDR3. With the new DDR4 architecture and added performance features, a substantial performance boost in bandwidth and command scheduling can be realized for 100% or better effective bandwidth increase. In addition, while mainstream DDR3 is at 1600 MT/s today, DDR4 will start at 2400 MT/s, eventually reaching 3200 MT/s.

Where will DDR4 devices be manufactured?

DDR4 will be produced in Micron fabs around the world, including Virginia, Singapore, and Taiwan.

Are there any features on DDR3 that have been eliminated by DDR4?

Not really; however, DDR4 does not require an external VREFDQ, but it does provide an internally generated VREFDQ that requires calibration by the DRAM controller.

How does this product compare to your competition in the DDR4 market?

We’re first to sample a fully functional, JEDEC JESD79-4-compliant DDR4 SDRAM, as well as functional test modules, well ahead of JEDEC DDR4 module standardization. Our initial DDR4 parts meet the industry’s advance projections for the JEDEC specification and will progress to meet the finalized JEDEC standard, as well.

Why is Micron behind the competition in delivering DDR4 samples?

Although Micron didn’t provide the first DDR4 sample, which consisted of a die with DDR4 logic on it, Micron was the first to provide a fully functional sample that was JEDEC JESD79-4-compliant. Micron’s DDR4 sample is the first production-quality DDR4 offering available.

DRAM FAQs (8)

Can CKE be tied HIGH throughout SDRAM operation (initialization and normal operation)?
JEDEC does not specify the exact state of CKE during initialization; it is supplier specific. Micron strongly recommends CKE be kept at an LVTTL logic LOW before applying a stable CLK signal. During normal operation, CKE can be tied HIGH. The initial LOW state of CKE prevents parts from receiving an illegal LMR command, which could put the part into an unknown or unexpected state.
Can the SDRAM clock frequency be changed?
Micron SDRAM data sheets require that the clock frequency be constant during access or precharge states (READ, WRITE, tWR, and PRECHARGE commands). At other times frequency should not matter much because there is no DLL in SDRAM however, we do not recommend it. Lowering SDRAM frequency is OK even if you are not doing an LMR and CAS latency change. In case of increasing frequency, ensure tCK and CAS latency specifications are met. In either case, all other data sheet timing specifications should be adhered to.
Is there a recommended lowest working frequency for SDRAM?
Because SDRAM does not have a DLL, there is no recommended lowest frequency. SDRAM parts will work at very low frequencies if all data sheet specifications are met. It is important to maintain a good slew rate, however, since a very slow slew rate will affect setup and hold-time transitions. Also, for operating frequencies of 45 MHz, tCKS = 3.0ns. For more information, see TN-48-09.
What is a "bank"?
A bank is an array of memory bits. Multiple arrays or banks are contained within a DRAM component. Depending on density, DRAM components may consist of 4 or 8 banks. For example, a bank may consist of 32 million rows, 4 bits across. This would equate to 128 megabits. Four of these banks in a single DRAM component would yield a 512Mb component.
What is the impedance tolerance of the driver in match-impedance mode relative to the expected value base on the perfect reference resistor connected to ZQ pin?
The impedance tolerance of the driver is ±15 percent.
Does thermal information change for IT parts?
Thermal information includes temperature limits and thermal impedance values. Temperature limits do change for IT parts (TC, TJ, and TA), but thermal impedance values (θJA, θJB, and θJC) do not because thermal impedance depends primarily on the package.
My design was based on a specification stating the JTAG was relative to VDD (1.8V), but now we’ve discovered that JTAG is actually relative to VDDQ (1.5V). It’s a fairly significant board spin to change this; what do I risk by leaving the design as-is? I assume that the specification is still for VDDQ + 0.3V = 1.8V, but with CMOS parts there’s no way I can guarantee that it won’t swing past that on transitions.
Your particular board design should not be a cause of major concern. The pins can handle the VDD voltage regardless of the VDDQ voltage.
Should the ECC memory chip share chip select and CKE signals with the other two main memory chips in our point-to-point application?
The ECC chip(s) should share the same CKE and CS# as the other devices because they are accessed as the same piece of data.

Products and Support FAQs (1)

Who do I contact if I have questions about my buymicron.com order?
If you have any questions about your order, contact buymicron.com.

HMC Arrives Just in Time to Be Your New Standard for Memory Performance: Part 3

November 20, 2013 by Tom Kinsley

Back again with part 3 of my blog series outlining the features and benefits of Micron’s HMC.  My last post covered HMC’s abstracted memory management, simplified and scalable interface, and superior performance.  Let’s finish up by discussing these additional key features: Uncomplicated Board Layout and Dense Package Our short-reach (SR) HMC device comes in two packages: the four-link, 31mm x 31mm package and the smaller two-link, 16mm x 19.5mm package, which are ea...Read More

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