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All blog posts tagged "Networking"

Lessons from Linley

Ryan Baxter   |   February 21, 2014   |   Events

Though I left Boise the morning of February 5 at 0-dark-hundred to catch a puddle-jumper down to SFO, my morning fatigue soon waned as I found myself standing under bright lights at a Hyatt Regency podium a little after 10 a.m. addressing a room full of engineers and system architects. This was my second appearance at the annual Linley Data Center Conference which was held in Santa Clara, CA February 5-6.  One of several conferences put on by the well-respected research group, this event co...

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Addressing the tFAW Effect for DDR3

Troy Quick   |   December 17, 2013   |   All Products

Today we announced a solution for an intrinsic DDR3 timing constraint that has been impacting our customers’ system performance. This is great news for networking apps, where tRRD and tFAW timing specifications can restrict much-needed data throughput. Here’s a little background on the issue. Activation delay or tRRD is the amount of time that must elapse between two ACTIVATE commands being issued to different banks.  Four-bank activation window or tFAW is the amount of time i...

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Tags: DRAM, DDR3, Networking

HMC Arrives Just in Time to Be Your New Standard for Memory Performance: Part 3

Tom Kinsley   |   November 20, 2013   |   All Products

Back again with part 3 of my blog series outlining the features and benefits of Micron’s HMC.  My last post covered HMC’s abstracted memory management, simplified and scalable interface, and superior performance.  Let’s finish up by discussing these additional key features: Uncomplicated Board Layout and Dense Package Our short-reach (SR) HMC device comes in two packages: the four-link, 31mm x 31mm package and the smaller two-link, 16mm x 19.5mm package, which are ea...

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HMC Arrives Just in Time to Be Your New Standard for Memory Performance: Part 2

Tom Kinsley   |   November 14, 2013   |   All Products

In my last post, I touched on some obstacles of traditional memory for system designers and hinted at the reasons why so many companies have selected Hybrid Memory Cube (HMC) as their new standard for memory performance. Here, let’s start to break down some of the key features—including abstracted memory,  unique interface, and superior performance—that make HMC such a breakthrough solution. Abstracted Memory Management and Communication The standard DDR4 data sheet excee...

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Buzz from the Linley Tech Processor Conference – HMC and More

Jay Walstrum   |   October 31, 2013   |   All Products

The week before last, I traveled 20 minutes down Highway 101 from Micron’s San Jose offices to Santa Clara to attend the 7th Annual Linley Tech Processor Conference. The small (just over 400 participants), two-day event was like a breath of fresh air compared to some of the more massive conferences that I’ve attended. There were some targeted OEMs and a smattering of industry media, but most of the attendees were real engineers trying to solve real problems. The keynote session cover...

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HMC Arrives Just in Time to Be Your New Standard for Memory Performance

Tom Kinsley   |   September 25, 2013   |   All Products

Hybrid Memory Cube

Time-to-market and the ability to “tweak” an existing design to achieve that next level of performance are paramount for system architects, board designers, layout engineers, and others responsible for developing high-performance, cost-sensitive, dependable systems. But if you’re reading this, you understand the frustrations and challenges in trying to meet those goals with traditional memory options. The design-to-market time requirements vary greatly by industry but are all ...

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See HMC Live!

Susan Platt   |   September 4, 2013   |   All Products

Our just-announced Altera/HMC reference boards represent an industry first in two ways. Not only are they the industry’s first public demonstration of HMC’s interoperability with FPGAs, but Altera is also the first enabler member of the HMC Consortium to announce product/production support for HMC in their next-generation devices. HMC will be supported by Altera’s Generation 10 portfolio, which  includes both Stratix 10 and Arria 10 FPGAs and SoCs. These reference boards g...

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A Full House – 1 GHz Rounds Out DDR3 Portfolio

Steven King   |   June 11, 2012   |   Memory

Our latest DRAM product rounds out our DDR3 offering in a big way for high-end networking and graphics customers. These new 1066MHz, 2133 MT/s data rate DDR3 devices can boost your bandwidth by as much as 33%, without significantly increasing power consumption. We’ve also collaborated with AMD Graphics and LSI to make sure that these parts are optimized for the latest SoCs and GPUs, making your design-in easier and extending the life of your existing DDR3 designs. Check out our 1 GHz DDR3 page ...

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The Future of Flash in the Enterprise

  |   May 15, 2012   |   Memory

Next week is EMC World, and Micron will be at the event talking about the advantages of Flash in the enterprise. Gearing up for the event, I had the chance to sit down with Ed Doller (our VP of Enterprise Storage Solutions) and Mark Sorenson (EMC’s senior VP of Flash products and technologies) to shed some light on this topic. Take a look at the video below to see what they had to say. Also, next week we’ll publish another video discussing the collaboration between the two companies.  

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Next-Gen, High-End Networking

Troy Quick   |   March 13, 2012   |   Memory

Today, Micron and Xilinx jointly announced our hardware demonstration of an FPGA interfacing to RLDRAM® 3 memory. For us, this announcement is exciting because it's a great example of what’s possible when industry leaders collaborate. More exciting and more important for our mutual customers is that this next-generation Virtex®-7 FPGA/RLDRAM 3 solution raises the bar for high-end networking performance by delivering 60% higher data rate and memory bandwidth than the previous platfo...

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