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All blog posts tagged "DRAM"

China and Storage: A View from the Huawei Cloud Congress, Shanghai

Scott Shadley   |   October 1, 2014   |   Events

Traveling around China this week and talking to customers, media, and industry experts was an eye-opener. The message that came through the loudest: enterprises in China are cost-conscious, but when the country's leading firms make investments in technology, they are willing to pay for performance and for a technological edge. This is particularly true when it comes to storage.

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Tags: DRAM, SSD, China

Why Arira Platforms Built an HMC Evaluation Board

Dan Williams   |   August 1, 2014   |   Memory

HMCDan Williams, Vice President Sales & Marketing / Arira Platforms

Tools and resources for customer testing and evaluation are key to the success of any emerging technology.  Hybrid Memory Cube (HMC) is no different.  At Arira, we saw the potential in HMC and started to consider creating an HMC evaluation board and development kit in April 2011. The platform would be used by customers to perform detailed evaluations of HMC performance in their specific applications and would enable the HMC to be exercised via a program written by that customer. The power supply design would have to enable monitoring of power levels on individual rails to both the HMC and the FPGAs.

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Dan Skinner Praised for Extraordinary Industry Leadership

Corporate Communication   |   June 19, 2014   |   All Products

Dan Sk

On June 18th, 2014, Micron’s Daniel Skinner was honored with JEDEC’s Award of Excellence. The award is the highest honor given by JEDEC—the leading global standards organization for the microelectronics industry. It recognizes just one out of its more than 3,000 members for dedicated service to the association and its mission.

Dan was selected based on his exemplary leadership as chairman of the LPDDR3 and LPDDR4 task groups, which established memory standards critical to furthering mobile innovation. Several JEDEC members, as well as JEDEC’s president, John Kelly, endorsed Dan’s technical expertise and collaboration skills, which were key in speeding these low-power memory standards to completion.

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Tags: DRAM, LPDRAM, Mobile, USA

Partnering With Freescale to Enable Internet of Things

Wendy Lee-Kadlec   |   April 28, 2014   |   All Products

Over the past few years, “Internet of Things” (IoT) has become an industry buzz word. Not surprisingly, IoT was also the main theme of the Freescale Technology Forum (FTF) held earlier this month in Dallas, Texas. FTF brings together embedded designers, as well as innovation enablers, like Freescale and Micron, to discuss current industry topics. This is my fifth year attending FTF—and it turned out to be one of the most exciting events yet! ...

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Tags: NAND, NOR, eMMC, DRAM, DDR3

Hacking Future Engineers

Micron Foundation   |   March 21, 2014   |   Our Communities

A new STEM-focused event in Boise is receiving a boost from Process Engineer Tristan Andreas, DRAM Designer and Senior Member Technical Staff Wen Li and the Micron Foundation. The inaugural Hackfort, a new component of the Treefort Music Fest, is bringing local technology talent together with three days of talks, panels, demos, presentations, product launches and workshops—including two Hardware Hack sessions led by Andreas on Saturday, March 22. The initial “Circuit-Bending” ...

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Automata Processor: It’s Not Just About Speed and Power Consumption

Paul Dlugosch   |   December 19, 2013   |   All Products

At Supercomputing 13 (SC13), I participated in a discussion panel on the topic of reconfigurable computing.  One recurring theme expressed by the audience was disappointment that the industry is not moving more quickly toward exascale-class performance despite the fact that we have some very powerful CPUs, GPUs, and reconfigurable logic engaged in this effort.  Several panel members pointed to insufficient programmer productivity as the root of this problem.  In other words, ...

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Addressing the tFAW Effect for DDR3

Troy Quick   |   December 17, 2013   |   All Products

Today we announced a solution for an intrinsic DDR3 timing constraint that has been impacting our customers’ system performance. This is great news for networking apps, where tRRD and tFAW timing specifications can restrict much-needed data throughput. Here’s a little background on the issue. Activation delay or tRRD is the amount of time that must elapse between two ACTIVATE commands being issued to different banks.  Four-bank activation window or tFAW is the amount of time i...

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Tags: DRAM, DDR3, Networking

A Look Back at SC13

Richard Murphy   |   December 13, 2013   |   All Products

I attended this year’s Supercomputing Conference (SC13) a few weeks ago and have finally had a chance to sift through all the news announcements, technical sessions, and meeting notes to provide you with a few highlights. Our very own Todd Farrell gave an overview of HMC technology to conference-goers while Micron and Fujitsu announced the integration of our HMC technology into a supercomputer! I think this is a game-changing system design, which will provide flatter, more powerful memory ...

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HMC Arrives Just in Time to Be Your New Standard for Memory Performance: Part 3

Tom Kinsley   |   November 20, 2013   |   All Products

Back again with part 3 of my blog series outlining the features and benefits of Micron’s HMC.  My last post covered HMC’s abstracted memory management, simplified and scalable interface, and superior performance.  Let’s finish up by discussing these additional key features: Uncomplicated Board Layout and Dense Package Our short-reach (SR) HMC device comes in two packages: the four-link, 31mm x 31mm package and the smaller two-link, 16mm x 19.5mm package, which are ea...

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HMC Arrives Just in Time to Be Your New Standard for Memory Performance: Part 2

Tom Kinsley   |   November 14, 2013   |   All Products

In my last post, I touched on some obstacles of traditional memory for system designers and hinted at the reasons why so many companies have selected Hybrid Memory Cube (HMC) as their new standard for memory performance. Here, let’s start to break down some of the key features—including abstracted memory,  unique interface, and superior performance—that make HMC such a breakthrough solution. Abstracted Memory Management and Communication The standard DDR4 data sheet excee...

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