Bare Die and Wafer Level Products
Requirements for smaller form factors and higher memory densities are fueling the need for bare die memory solutions due to their superior flexibility. Wafer-level products can be used in packaging technologies such as systems-in-a-package (SIPs) and multi-chip packages (MCPs) to reduce the board area required. With reduced trace lengths between devices, bare-die-based solutions also enable higher-frequency operation as processor and bus speeds increase. These benefits can come at a cost, however. Because the poorest performing die in the stack determines the quality of an MCP, it is important that you not be forced to scrap expensive devices due to a nonfunctioning or unreliable part. Micron is committed to delivering bare die products that maintain reliability and quality levels similar to fully tested and burned-in packaged devices.
Need More Information on our Wafer-Level Products?
Micron’s Bare Die Secure documents are designed to enable you to choose the wafer-level products that best meet your needs. This information takes the form of data sheets, technical notes, customer service notes, presentations, and simulation models.
Micron's bare die data sheets provide the information you need: X/Y coordinates with "street" widths; die dimensions; bonding instructions; and storage and care guidelines.
Ordering Wafer-Level Products
For more information about ordering Micron bare die products directly from Micron, please Contact Us.