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MT48LC64M8A2P-75 IT

Data Sheets (1)

Data Sheet
  • File Type: PDF
  • Updated: 05/2015

Specs

Orderable Parts for: MT48LC64M8A2P-75 IT
Status Media FBGA Code SPD Data Chipset
Validation
PLP Start Date Alternative Part
MT48LC64M8A2P-75 IT:C EOL N/A N/A N/A N/A No N/A
Detailed Specifications
Density 512Mb Part Status End of Life RoHS Yes Depth 64Mb
Width x8 Voltage 3.3V Package TSOP Pin Count 54-pin
Clock Rate 133 MHz Cycle Time 7.5ns Op. Temp. -40C to +85C CL CL = 3
Data Rate PC133

Sim Models & Software

Sim Models
Verilog
  • File Type: ZIP
  • Updated: 05/12/2016
IBIS
IBIS (ZIP)

2.4

  • File Type: ZIP
  • Updated: 04/14/2004
HSpice
HSpice (ZIP)

2.3

  • File Type: ZIP
  • Updated: 04/14/2004
Verilog
Verilog (ZIP)

  • File Type: ZIP
  • Updated: 06/05/2002

RoHS Certificates

RoHS Certificates
RoHS Certificate of Compliance (PDF)

Part-specific certification of how this product meets the requirements of the current DIRECTIVE 2002/95/EC, a.k.a. Restriction of Hazardous Substances (RoHS) Directive.

  • File Type: (PDF)
  • Updated: 12/2016
RoHS Certificates
China RoHS Certificate (PDF)

Part-specific certification as required by China's Management Methods for Controlling Pollution by Electronic Information Products.

  • File Type: (PDF)
  • Updated: 12/2016

Documentation & Support

See All SDRAM Documentation
Technical Notes
Search (7) SDRAM Technical Notes
Technical Notes


(TN-00-01) This technical note describes shipping procedures for preventing memory devices from absorbing moisture and recommendations for baking devices exposed to excessive moisture.

  • File Type: PDF
  • Updated: 02/14/2013
Technical Notes


(TN-00-24) This technical note compares the I/O characteristics of the 54nm to the 130nm single data rate (SDR) synchronous dynamic random access memory (SDRAM) die.

  • File Type: PDF
  • Updated: 05/25/2011
Technical Notes


(TN-48-09) Describes the proper setup and hold time derating when the slew rate during transition time violates specification.

  • File Type: PDF
  • Updated: 11/19/2009
Technical Notes


(TN-00-19) This technical note provides information on optimal wafer-thinning processes to meet specific customer requirements.

  • File Type: PDF
  • Updated: 10/15/2009
Technical Notes


(TN-46-14) This technical note provides hardware tips for point-to-point system design including termination, layout, and routing.

  • File Type: PDF
  • Updated: 06/30/2008
Search (7) SDRAM Technical Notes

Parts with the same Data Sheet (2)

MT48LC64M8A2P-75 IT ( Current ) MT48LC32M16A2TG-75 IT MT48LC64M8A2TG-75 IT
Part Status End of Life End of Life Contact Factory
Density 512Mb 512Mb 512Mb
RoHS Yes 5/6 5/6
Depth 64Mb 32Mb 64Mb
Width x8 x16 x8
Voltage 3.3V 3.3V 3.3V
Package TSOP TSOP TSOP
Pin Count 54-pin 54-pin 54-pin
Clock Rate 133 MHz 133 MHz 133 MHz
Cycle Time 7.5ns 7.5ns 7.5ns
Op. Temp. -40C to +85C -40C to +85C -40C to +85C
CL CL = 3 CL = 3 CL = 3
Data Rate PC133 PC133 PC133

Where to Buy

Orderable Parts
Status Media FBGA Code SPD Data Chipset
Validation
PLP Start Date Alternative Part
MT48LC64M8A2P-75 IT:C EOL N/A N/A N/A N/A No N/A
Contact Your Sales Rep
Contact A Rep
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Check with Distributors
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