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MT47H256M8THN-25E

Data Sheets (1)

Data Sheet
  • File Type: PDF
  • Updated: 04/2014

Specs

Orderable Parts for: MT47H256M8THN-25E
Status Media FBGA Code SPD Data Chipset
Validation
PLP Start Date Alternative Part
MT47H256M8THN-25E:M Production N/A D9RVG N/A N/A No N/A
Detailed Specifications
Density 2Gb Part Status Production RoHS Yes Depth 256Mb
Width x8 Voltage 1.8V Package FBGA Pin Count 63-ball
Clock Rate 400 MHz Cycle Time 2.5ns Op. Temp. 0C to +85C CL CL = 5
Data Rate DDR2-800

Sim Models & Software

Sim Models
IBIS

2.0 (Die Rev. M)

  • File Type: ZIP
  • Updated: 07/09/2015
HSpice
HSpice (ZIP)

2.0 (Die Rev. M)

  • File Type: ZIP
  • Updated: 07/09/2015
Verilog
  • File Type: ZIP
  • Updated: 04/29/2010

RoHS Certificates

RoHS Certificates
RoHS Certificate of Compliance (PDF)

Part-specific certification of how this product meets the requirements of the current DIRECTIVE 2002/95/EC, a.k.a. Restriction of Hazardous Substances (RoHS) Directive.

  • File Type: (PDF)
  • Updated: 12/2016
RoHS Certificates
China RoHS Certificate (PDF)

Part-specific certification as required by China's Management Methods for Controlling Pollution by Electronic Information Products.

  • File Type: (PDF)
  • Updated: 12/2016

Documentation & Support

See All DDR2 SDRAM Documentation
Technical Notes
Search (19) DDR2 SDRAM Technical Notes
Technical Notes


(TN-00-01) This technical note describes shipping procedures for preventing memory devices from absorbing moisture and recommendations for baking devices exposed to excessive moisture.

  • File Type: PDF
  • Updated: 02/14/2013
Technical Notes


(TN-47-04) This technical note details how DDR2 SDRAM consumes power and provides tools to estimate power consumption in a given system.

  • File Type: PDF
  • Updated: 03/18/2011
Technical Notes


(TN-47-19) This technical note focuses on the unique memory requirements of point-to-point design layouts and describes DDR2 features and functionality.

  • File Type: PDF
  • Updated: 03/18/2011
Technical Notes


(TN-47-14) This technical notes describes the tCKE timing parameter of DDR2 SDRAM.

  • File Type: PDF
  • Updated: 04/09/2010
Technical Notes


(TN-47-05) This technical note provides general guidelines for designing power circuitry for DDR2 memory; it includes the DDR2 voltage requirements and encompasses a sample reference design focused on the Texas Instruments Incorporated (TI) TPS51116 DDR2 memory power solution.

  • File Type: PDF
  • Updated: 04/08/2010
Search (19) DDR2 SDRAM Technical Notes

Parts with the same Data Sheet (3)

MT47H256M8THN-25E ( Current ) MT47H256M8THN-3 MT47H512M4THN-25E MT47H512M4THN-3
Part Status Production Obsolete Production Obsolete
Density 2Gb 2Gb 2Gb 2Gb
RoHS Yes Yes Yes Yes
Depth 256Mb 256Mb 512Mb 512Mb
Width x8 x8 x4 x4
Voltage 1.8V 1.8V 1.8V 1.8V
Package FBGA FBGA FBGA FBGA
Pin Count 63-ball 63-ball 63-ball 63-ball
Clock Rate 400 MHz 333 MHz 400 MHz 333 MHz
Cycle Time 2.5ns 3ns 2.5ns 3ns
Op. Temp. 0C to +85C 0C to +85C 0C to +85C 0C to +85C
CL CL = 5 CL = 5 CL = 5 CL = 5
Data Rate DDR2-800 DDR2-667 DDR2-800 DDR2-667

Where to Buy

Orderable Parts
Status Media FBGA Code SPD Data Chipset
Validation
PLP Start Date Alternative Part
MT47H256M8THN-25E:M Production N/A D9RVG N/A N/A No N/A
Contact Your Sales Rep
Contact A Rep
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Check with Distributors
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