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Knights Landing, Intel’s next-generation Xeon Phi™ CPU architecture, leverages the fundamental DRAM and stacking technologies found in our high-performance, on-package memory, the Hybrid Memory Cube (HMC).

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The Hybrid Memory Cube (HMC) is a small, high-speed logic layer that sits below vertical stacks of DRAM die that are connected using through-silicon-via (TSV) interconnects. HMC represents a fundamental change in how memory is used in the system.

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Short-Reach Hybrid Memory Cube (HMC) Part Catalog

Short-Reach Hybrid Memory Cube (HMC) Obsolete Part Catalog

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Micron's broad portfolio of high-performance technologies and products—including DRAM, NAND and NOR Flash—is the basis for solid state drives, modules, multichip packages and other system solutions.

In Friday’s blog post, we talked about how the U.S. recaptured the Top500 supercomputing lead with the IBM-Lawrence Livermore system named Sequoia. But Fujitsu, creator of last year’s top supercomputer, K, hasn’t been standing still in this department. The K supercomputer at...

  • Publication Date: 06/25/2012
  • Author: Dean Klein

When you’ve invested a lot of hours and hard work into developing a new technology, it’s rewarding when your labors get noticed. That’s why we were especially excited when our Hybrid Memory Cube received some really BIG attention, The Linley Group’s Analysts’ Choice Award for...

  • Publication Date: 01/30/2012
  • Author: Brent Keeth

This week the HMC consortium (HMCC) announced that the managing developers had released the first draft of an Hybrid Memory Cubeinterface specification—a sign the group is making significant progress toward making the technology widely available and adoptable. The draft itself...

  • Publication Date: 08/16/2012
  • Author: Dean Klein

For over 4 years, Micron and Altera have been collaborating on HMC technologies. This ongoing work led to the industry’s first demonstration of a working HMC controller, announced last September and demonstrated at the Supercomputing ’13 Conference in Denver.

  • Publication Date: 01/29/2014
  • Author: Jay Walstrum

At Micron, we’re always excited by the rise of a new 3D semiconductor architecture. So much so that on December 11, I gave an overview and outlook of 3D memory solutions to a full house at the 11th annual 3D Architectures for Semiconductor Integration and Packing (3D ASIP)...

  • Publication Date: 12/22/2014
  • Author: Rob Sturgill