CMOS Under the Array? That probably sounds like some new militaristic video game, but it is really an innovation in flash memory that enables lower cost solutions. Let me explain.
All types of memory, including flash memory, have two primary circuit components – the memory array that stores the data (1’s and 0’s), and the logic circuitry that controls how that data is moved to, from and within the memory chip. Although the logic is required for the chip to function correctly, it is overhead that reduces how many gigabytes of data can be stored within a given chip area. Therefore, the smaller we can make the logic area, the lower cost per gigabyte our product is. The semiconductor process used to fabricate the logic is called CMOS, which stands for Complementary Metal Oxide Semiconductor.
For 2D or planar NAND – the primary type of flash memory produced today where the memory cells are laid out in the X/Y direction – the logic also has to be laid out in the same X/Y direction. Therefore, the only way to reduce the logic area is to use less of it, which can seriously compromise performance and reliability. In some less efficient designs, the total flash chip size can be 20% (or more) larger than the memory array. With 3D NAND – the new type of flash where we stack memory cells in the vertical or Z direction – that logic restriction no longer applies. Micron had the foresight to put as much of our CMOS (logic) underneath the memory as we could, which makes the total chip size not much bigger than what is absolutely required for the memory array. We call this innovation, CMOS Under the Array, or CUA for short. Our competition does not do this, and the result is less gigabytes of storage within a given chip area.
Sticking with that military theme, we in the flash industry are always in battle to lower costs faster than our competition, and Micron just launched a salvo with CUA that is going to be hard for anyone to recover from.
About Our Blogger
Kevin is Micron Technology's Director of NAND Marketing.