For over 4 years, Micron and Altera have been collaborating on HMC technologies. This ongoing work led to the industry’s first demonstration of a working HMC controller, announced last September and demonstrated at the Supercomputing ’13 Conference in Denver. The working demonstration board consists of one Micron® HMC short reach (SR) device and four 28nm Altera Stratix V FPGAs, each of which has 40 GB/s of bandwidth for 160 GB/s of total bandwidth. This demonstration of Stratix V and HMC working together will enable customers to leverage their current development with Stratix V FPGAs to provide ultra-high system performance for a variety of applications that are in need of greater bandwidth, including the communications, military, broadcast, and compute markets.
Check out this video of Altera Product Marketing Manager, Manish Deo, and me to learn more about the demo.
About Our Blogger
Jay Walstrum is a Senior System Architect for Micron’s Compute and Networking Business Unit, where he is focusing on new opportunities in the three to five-plus year timeframe. In his role, he also applies innovative technologies and memory architectures to solve customer system-level challenges.
Jay’s responsibilities include working closely with a market-strategy team to identify new technology, applications, product/architecture specifications, customers, and markets for new product concepts. He also actively works with customer system architects, technologists, third-party developers, and Micron’s Research and Development team to identify, define, and architect innovative memory solutions.
Before beginning with Micron in January 2013, Jay spent 22 years at Xilinx Corp, where he held various positions ranging from the Director of Quality, to the Senior Product Planning Manager, to the Strategic and Technical Marketing Leader.
Jay holds a BSEE from University of Southern California. He holds 11 patents in the areas of FPGA system Solutions and memory interface architecture.