Memory

5G Early Results Are In, and They Look Fantastic

By Jay Walstrum - 2.20.18

If you’ve been following the technology news surrounding the winter games, you know that a temporary 5G network was set up to showcase what future networks will be able to do (and also, apparently, deploy an array of sensors and devices to keep wild boars off the competition runs).

Many have paid a lot of money and time to get to their seat in the arena, where it is still too far from the event to see the details of the competition. Imagine being able to see every turn of a skier in the downhill race, as opposed to the one turn selected by the cameraman. Wouldn’t it be great to have a front seat with an excellent view regardless of where you’re sitting?

This is true for any major event, and the revolution of 5G provides a new promise for how we will experience the world around us.

So, what is being delivered with 5G? 5G adds a boost in bandwidth to 10Gbps, a system latency of sub 1ms paired with a significant reduction in power consumption over existing networks, all with unlimited availability and area coverage. Think of how that translates into your system architecture and your memory subsystem. New solutions are required to feed these requirements.

And who has been working on this? Micron’s networking team has been preparing for 5G for the past 2 years by engaging with OEMs to develop, deliver and advise on the correct products to fulfill the requirements for 5G. This includes roadmap discussions and system architecture definitions to outline the power, space, performance requirements.

Why is Micron in such a leadership position to provide the engagement with the key OEMS?

5G is driving a shift in mobile network design and pushing the limits of bandwidth, latency and efficiency. Micron has a broad set of solutions that will enable every aspect of the complete 5G solution.

Micron unveiled its latest portfolio addition, the GDDR6N, offering unparalleled performance of up to 48GB/s of network grade bandwidth using standard BGA packaging. From lowest latency RLDRAM3 to highest bandwidth solutions with GDDR6 and even non-volatile mass storage solutions, our portfolio covers your needs for your 5G equipment, being it Active Antenna elements, Radio Heads, base stations or backbone equipment. Our networking-grade solutions are built to meet the requirements of our customers’ latest, high-performance designs.

Don’t underestimate the value of early design discussions with a technology partner that is tracking industry demands and can advise on a full suite of memory and storage solutions. The combination of an extensive portfolio and collaborative industry relationships is your key to having the best seat in the house when 5G arrives.

Jay Walstrum

Jay Walstrum

Jay Walstrum is a Senior System Architect for Micron’s Compute and Networking Business Unit, where he is focusing on new opportunities in the three to five-plus year timeframe. In his role, he also applies innovative technologies and memory architectures to solve customer system-level challenges.

Jay’s responsibilities include working closely with a market-strategy team to identify new technology, applications, product/architecture specifications, customers, and markets for new product concepts. He also actively works with customer system architects, technologists, third-party developers, and Micron’s Research and Development team to identify, define, and architect innovative memory solutions.

Before beginning with Micron in January 2013, Jay spent 22 years at Xilinx Corp, where he held various positions ranging from the Director of Quality, to the Senior Product Planning Manager, to the Strategic and Technical Marketing Leader.

Jay holds a BSEE from University of Southern California. He holds 11 patents in the areas of FPGA system Solutions and memory interface architecture.

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