Memory // Innovations

Get on the Xccela™ Bus with the Xccela Consortium

By Martin Or - 2016-12-15

Xccela™ flash 

Are you looking for a high-performance system bus to accommodate firmware and software execution as well as data processing and storage? Are you tired of the tradeoffs between performance and footprint when choosing a system bus? Are you confused on the competing interface standards and not sure which one to choose? Look no further, just get on the Xccela Bus!

The Xccela Bus is the next generation of system buses that combines accelerated performance with a small signal count, the best of both worlds. In its first iteration, the Xccela Bus enables extremely fast data transfers while paving the way for simpler system designs.  Specification (v1.0) highlights:

  • Octal DDR protocol
  • SPI-compatible serial bus interface
    • Extended-SPI protocol with octal commands
  • Single transfer rate (STR) and double data rate (DDR with strobe)
  • Clock frequency
    • 166 MHz (MAX) in STR (166 MB/s)
    • 200 MHz (MAX) in DDR (400 MB/s) with DQS
  • 11 signal pins
  • 3V and 1.8V

Micron has just launched the Xccela Consortium to promote the Xccela Bus as an open and de facto standard for volatile and nonvolatile memories as well as other types of integrated circuits.  The purpose of the Consortium is to accelerate the industry efforts in bringing a broad set of Xccela Bus compliant memories, controllers, SoCs/ASICs, etc. to the market. 

The Xccela Consortium is open to all adopters, whether they be semiconductor manufacturers, systems electronics companies, or test and measurement companies.  The Consortium is rapidly gaining acceptance among memory manufacturers.  Click on the following link to learn about the Xccela Consortium and to get on the Xccela Bus!

Amit Gattani

Martin Or