The single chip module (SCM) solution spans across many applications that are looking to reduce physical size and complexity. By using the SCM, most of the design work is done for you and it results in smaller products.
The embedded business unit ecosystem team has been working with its partner, Freescale Semiconductor, on an innovative SCM packaging technology. Freescale featured their first SCM as part of their keynote at the Freescale Technology Forum (FTF) on June 23, 2015.
Freescale’s first SCM integrates a dual core i.MX6 processor, Power Management Integrated Circuits (PMIC), over 100 discrete components, 128Mb of Micron’s QSPI NOR Flash die, and up to 16Gb of Micron’s LPDDR2 memory on a tiny 17mm x 14mm x 1.7mm package. The following image shows the demo running at the Micron booth at FTF.
The tiny SCM was actually playing the HDMI video.
Systems Solution: SCM-i.MX 6D shows simulated cutaway view and the top and bottom views of the SCM package.
The best way to appreciate the true space savings of SCM is to do a system level implementation comparison. Image 1 shows the approximate size of the board space that traditional package on-board designs require. Image 2 is the same area but only shows the SCM. To aid in identifying the PCB space savings, Image 2 has a similar sized board, but has cross-hatched the ~3 square inches of board savings.
In the images below, you can see the back side of the respective modules. You might think that the comparison is not fair since they have two LPDDR2 DRAM’s on the front and two on the back (Image 3) in the discrete implementation. Actually, the discrete implementation is using 4Gb packages. In the SCM, Freescale chose Micron’s PoP LPDDR2 device, which integrates four of the same 4Gb LPDDR2 die into a single 12mm x 12mm 216-ball package. The device supports 64 data bits which is required to obtain the maximum performance of the i.MX6 processor.
Actual Case Study
InHand Electronics has actually implemented Freescale’s SCM with the design of their Fury-M6 (Image 5). As you can see, the completed SCM (middle of the board) is about the same size as their wireless module and smaller than the e.MMC (lower center). That is a lot of integration in a small package. As a side note, they actually chose the 169 ball VFBGA 14mm x 18mm x 1.0mm package for the e.MMC because it appears that the SCM provided more than adequate savings. They could have saved even more room by selecting the e.MMC in the 153 ball WFBGA 11.5mm x 13mm x 0.8mm package.
For more details on InHand’s development using the Freescale SCM, please read their full blog.
Freescale also showed another SCM development (Image 6) but it didn’t get as much press.
For this project, they integrated Micron’s 4Gb LPDDR2 die with their i.MX6SX processor and a WiFi chip directly into the SCM. You will notice that they did not integrate the PMIC circuitry (to the left of the processor).
Now back to the i.MX6D SCM and the topic of shrinking systems: I intentionally left the e.MMC storage device, on the lower left corner of both implementations (Images 3 and 4), to mention that Micron also offers a product known as eMCP. eMCP includes LPDDR2 and e.MMC in a single Multiple Chip Package (MCP). While today’s eMCP only supports a 32 bit LPDDR2 datapath, it does integrate the e.MMC storage with the LPDDR2, so it might not is not a good fit for the SCM discussed. Micron’s eMCP is actually used on Freescale’s wearable reference board, as shown in Image 7.
In addition, we recently introduced a PoP version of the eMCP named ePoP. Image 8 shows the potential board space savings if the WaRPBoard were to use the ePoP. Please note this not a real product yet. It is simply a representation of what the space savings could look like.