DDR4 Gathers Momentum

By Scott Schaefer - 2012-12-13

Back in May 2012, we announced our first fully functional DDR4 module. Since then a lot has happened.

For starters, our DDR4 modules were selected as one of the year’s most compelling products by EDN

And there’s more. Since the JEDEC DDR4 standard was published on September 25, 2012, we’ve been actively engaged in supporting educational and outreach activities for the new standard, including presenting at ongoing workshops in Santa Clara and Taiwan where participants learn about DDR4’s device operation, migration issues, and numerous features that address reliability, speed, power, and stacking capabilities.

One slick new feature of the DDR4 standard is the inclusion of Connectivity Test (i.e. boundary scan) for memory down applications. Connectivity Test (a type of  JTAG) enhances device and/or module manufacturing testing by enabling early fault detection, which reduces time spent on debugging, improving system reliability, and ultimately saving development and production costs. 

For more information on this DDR4 capability, DDR3 to DDR4.

So what’s next? More DDR4 information—including Verilog models, IBIS models, data sheets, Power Calculators, etc.—coming to in January.

Scott Schaefer