1Gb DDR3 SDRAM Component : MT41J128M8BY-15E

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Wafer

Illustration only. See data sheet for product specifications.

Specifications

Density:
1Gb
Part Status:
EOL Pending
RohS:
Yes
Depth:
128Mb
Width:
x8
Voltage:
1.5V
Package:
FBGA
Pin Count:
86-ball
Clock Rate:
667 MHz
Cycle Time:
1.5ns
Op. Temp.:
0C to +95C
CL:
CL = 9
Data Rate:
DDR3-1333

Description

DDR3 SDRAM is a high-speed dynamic random-access memory that uses an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O bond pads.  

RoHS-Compliant: This part meets internationally recognized Pb-free standards, including RoHS. 

PDF RoHS Certificate of Compliance
PDF China RoHS Certificate

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Product Support

File Title and Description ID Number Last Update
xls DDR3 Power Calculator - Calculates the power consumed by a DDR3 SDRAM based on system use parameters and the device data sheet. Aug 2009
pdf CSN-20: Whole Wafer Packaging CSN-20 Jun 2009
pdf DDR3 Power-Up, Initialization, and Reset - Describes power-up, initialization, and the RESET# pin in DDR3 TN-41-07 Nov 2008
pdf High speed DRAM controller design - Identifies and discusses five key areas of DRAM controller design TN-45-54 Apr 2008
pdf DDR3 Dynamic On-Die Termination - With DDR3, dynamic ODT provides systems with increased flexibility to optimize termination values for different loading conditions. TN-41-04 Mar 2008
pdf DDR3 Termination Data Strobe - Provides guidelines for using the TDQS feature to reduce signal integrity issues associated with mismatched DQS loading in in combined x4-based/x8-based systems TN-41-06 Mar 2008
pdf DDR3 ZQ Calibration - Describes how the DDR3 SDRAM driver design has been enhanced TN-41-02 Feb 2008
pdf Calculating Memory System Power For DDR3 - Details how DDR3 SDRAM consumes power and provides the tools that system designers can use to estimate power consumption. TN-41-01 Aug 2007