| File |
Title and Description |
ID Number |
Last Update |
Software Downloads |
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SPD JEDEC Standards for UDIMMs, RDIMMs, and SODIMMs
- This application note fully describes the Serial Presence Detect assignments for SPD used on DDR SDRAM Modules |
JEDEC TN-02 |
Nov 2001 |
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TN-00-01: Moisture Absorption in Plastic Packages
- Describes the shipping procedures that ensure Micron’s customers receive memory devices that do not exhibit the popcorn effect |
TN-00-01 |
Mar 2007 |
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TN-00-06: Bypass Capacitor Selection for High-Speed Designs |
TN-00-06 |
Sep 1999 |
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TN-00-07: IBIS Behavioral Models |
TN-00-07 |
Sep 1999 |
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TN-00-08: Thermal Applications
- Defines a general method and criteria for measuring and ensuring that Micron components and modules do not exceed the maximum allowable temperature. |
TN-00-08 |
Feb 2007 |
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TN-00-09: Accelerate Design Cycles With Micron Simulation Models |
TN-00-09 |
Oct 2006 |
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TN-00-14: Understanding the Quality and Reliability Requirements for Bare Die Applications |
TN-00-14 |
Sep 2001 |
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TN-00-15: Recommended Soldering Parameters |
TN-00-15 |
Mar 2007 |
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TN-00-17: Timing Specification Derating for High Capacitance Output Loading
- Describes how to create capacitance derating data for Micron products that can then be used in preliminary evaluations of system timing |
TN-00-17 |
May 2004 |
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TN-00-18: Uprating of Semiconductors for High-Temperature Applications
- Describes the issues associated with temperature uprating and the risks involved in using components and/or systems outside the manufacturer’s environmental specifications |
TN-00-18 |
Feb 2007 |
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TN-00-19: Thinning Considerations for Wafer Products
- Information on optimal wafer-thinning processes to meet specific customer requirements |
TN-00-19 |
Nov 2004 |
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TN-00-19: Thinning Considerations for Wafer Products
- Information on optimal wafer-thinning processes to meet specific customer requirements |
TN-00-19 |
Nov 2004 |
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TN-00-20: The Value of Signal Integrity
- Describes how memory design, test, and verification tools can be used to the greatest advantage, from conception of a new product through end of life |
TN-00-20 |
Jun 2005 |
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TN-04-42: Memory Module Serial Presence-Detect
- Focuses on SPD values and definitions for DDR memory |
TN-04-42 |
Oct 2003 |
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TN-04-42: Memory Module Serial Presence-Detect
- Focuses on SPD values and definitions for DDR memory |
TN-04-42 |
Oct 2003 |
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TN-04-49: Comparing Module Parameters |
TN-04-49 |
Jan 2003 |
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TN-46-03: Calculating DDR Memory System Power |
TN-46-03 |
Mar 2005 |
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TN-47-01: DDR2-533 Memory Design Guide for Two-DIMM Unbuffered Systems
- DDR2-533 memory design guide for two-DIMM, unbuffered systems |
TN-47-01 |
Oct 2004 |
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TN-47-01: DDR2-533 Memory Design Guide for Two-DIMM Unbuffered Systems
- DDR2-533 memory design guide for two-DIMM, unbuffered systems |
TN-47-01 |
Oct 2004 |
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TN-47-03: DDR2 Memory Module Pinout Decode Tables
- Provides sorted pin assignment tables and pin location figures for use in DDR2 DIMM signal identification, tracing, and troubleshooting |
TN-47-03 |
Aug 2004 |
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TN-47-05: Power Solutions for DDR2 Notebook PCs
- Provides a general guideline for designing the DDR2 memory power circuitry |
TN-47-05 |
Jun 2004 |
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TN-47-06: Updated JEDEC DDR2 Specifications (mods too)
- Covers the updated JEDEC specifications for systems using the initial DDR2-400 and DDR2-533 parts |
TN-47-06 |
Aug 2004 |
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TN-47-07: DDR2 Simulation Support
- Covers DDR2 simulation, adding to Micron's extensive array of design support tools for system designers |
TN-47-07 |
Aug 2004 |
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TN-47-07: DDR2 Simulation Support
- Covers DDR2 simulation, adding to Micron's extensive array of design support tools for system designers |
TN-47-07 |
Aug 2004 |
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TN-47-09: DDR2 SDRAM Bank Addressing (both)
- Describes the evolution in array architecture from DDR to DDR2 SDRAM |
TN-47-09 |
Dec 2004 |
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TN-47-10: DDR2 Posted CAS# Additive Latency (both)
- Describes the AL function of the DDR2 SDRAM device |
TN-47-10 |
Dec 2004 |
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TN-47-11: DDR2 Differential DQS both
- Describes the differential DQS function of the DDR2 SDRAM |
TN-47-11 |
Dec 2004 |
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TN-47-12: DDR2 Redundant DQS both
- Describes how to enable the redundant data strobe (RDQS) |
TN-47-12 |
Dec 2004 |
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TN-47-13: DDR2 Read Interrupt (both)
- Describes legal execution of a READ interrupted by a READ command |
TN-47-13 |
Dec 2004 |
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TN-47-14: DDR2 tCKE Power-Down (both)
- Describes the tCKE timing parameter of DDR2 SDRAM |
TN-47-14 |
Dec 2004 |
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TN-47-16: Designing for High-Density DDR2 Memory
- Focuses on designing for high-density memory—addressing schemes of each density, configurations, and the subtle differences between the 4-bank and new 8-bank DDR2 devices |
TN-47-16 |
May 2005 |
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TN-48-03: Designing for High Performance With Synchronous DRAM Modules |
TN-48-03 |
Feb 1999 |
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TN-48-04: Is Your Module PC100?
- Explains how to determine if a module using Micron SDRAMs is PC100-compliant. The speed designator on the SDRAM component does not necessarily reflect the system application speed of the module. |
TN-48-04 |
Feb 1999 |
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TN-48-04: Is Your Module PC100?
- Explains how to determine if a module using Micron SDRAMs is PC100-compliant. The speed designator on the SDRAM component does not necessarily reflect the system application speed of the module. |
TN-48-04 |
Feb 1999 |
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TN-48-05: SDRAM WRITE to ACTIVE Command Timing |
TN-48-05 |
Nov 2000 |
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TN-48-15: Backward Compatibility for Faster SDRAM
- Reviews the timing differences between SDRAM generations and shows how the faster Micron parts are compatible with the slower parts |
TN-48-15 |
Oct 2005 |
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TN-49-01: RLDRAM II Design Guide
- Describes the general features of circuit implementations using RLDRAM memory architecture |
TN-49-01 |
Jan 2006 |
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