Choose the Right Die-Stacking Solution

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MultiChip Packages

SoC, SiP, PoP, MCP? Choose the Right Die-Stacking Solution

No one die-stacking technology suits every application. Each offers different benefits in terms of four key design elements: board space, height, performance, and cost. Micron senior applications engineer Chris Pages explains the advantages and disadvantages of four popular stacking solutions—SoC, SiP, PoP, and MCP—in this 20-minute online presentation. Let Micron’s expertise help you pick the best technology for your application. Click the "View Now" link below to begin the presentation.

View Now

This presentation is available to Micron.com users; if you’re not yet registered, you’ll be guided through a simple sign-on process.

Package Illustrations

Click the play button on the animations below to view the basic packaging differences between Micron MCPs and PoPs.

Multichip Package


Package-on-Package


Mobile DRAM – Ultra Low Power, Specialized Mobile Features

The powerful functionality of Mobile DRAM makes it a key component in our MCP designs. Mobile DRAM delivers an inherently low self refresh current and a myriad of special mobile features that can dramatically reduce power consumption. This leading-edge product line also features a combination of unique design methodologies to deliver low power, high quality, high reliability, and overall robustness to your designs.

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Micron NAND Flash – Standardized Compatibility, High Performance

Micron's tradition of superior quality, innovation, and technological excellence is an integral part of our high-density NAND Flash road map. We use an industry-standard interface for drop-in capability and easy integration into most existing designs. Micron Flash memory also offers high-performance features, including a READ CACHE function that streams more than 30MB per second. Micron offers NAND Flash in densities from 1Gb to 8Gb today, and is actively pursuing plans for densities of 16Gb and greater.

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