| File |
Title and Description |
ID Number |
Last Update |
Software Downloads |
 |
TN-00-01: Moisture Absorption in Plastic Packages
- Describes the shipping procedures that ensure Micron’s customers receive memory devices that do not exhibit the popcorn effect |
TN-00-01 |
Mar 2007 |
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TN-00-06: Bypass Capacitor Selection for High-Speed Designs |
TN-00-06 |
Sep 1999 |
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TN-00-07: IBIS Behavioral Models |
TN-00-07 |
Sep 1999 |
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TN-00-08: Thermal Applications
- Defines a general method and criteria for measuring and ensuring that Micron components and modules do not exceed the maximum allowable temperature. |
TN-00-08 |
Feb 2007 |
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TN-00-09: Accelerate Design Cycles With Micron Simulation Models |
TN-00-09 |
Oct 2006 |
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TN-00-14: Understanding the Quality and Reliability Requirements for Bare Die Applications |
TN-00-14 |
Sep 2001 |
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TN-00-15: Recommended Soldering Parameters |
TN-00-15 |
Mar 2007 |
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TN-00-17: Timing Specification Derating for High Capacitance Output Loading
- Describes how to create capacitance derating data for Micron products that can then be used in preliminary evaluations of system timing |
TN-00-17 |
May 2004 |
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TN-00-18: Uprating of Semiconductors for High-Temperature Applications
- Describes the issues associated with temperature uprating and the risks involved in using components and/or systems outside the manufacturer’s environmental specifications |
TN-00-18 |
Feb 2007 |
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TN-00-19: Thinning Considerations for Wafer Products
- Information on optimal wafer-thinning processes to meet specific customer requirements |
TN-00-19 |
Nov 2004 |
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TN-00-20: The Value of Signal Integrity
- Describes how memory design, test, and verification tools can be used to the greatest advantage, from conception of a new product through end of life |
TN-00-20 |
Jun 2005 |
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TN-04-52: Sourcing Micron Memory Modules for the Intel 865 (Springdale) and 875 (Canterwood) Series Chipsets
- Discusses two important functional differences between the 865 and 875 to consider when sourcing memory modules |
TN-04-52 |
Aug 2003 |
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TN-47-01: DDR2-533 Memory Design Guide for Two-DIMM Unbuffered Systems
- DDR2-533 memory design guide for two-DIMM, unbuffered systems |
TN-47-01 |
Oct 2004 |
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TN-47-02: DDR2 SDRAM Offers New Features and Functionality
- Discusses the various changes in DDR2 technology and the resulting features and benefits |
TN-47-02 |
Jun 2006 |
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TN-47-03: DDR2 Memory Module Pinout Decode Tables
- Provides sorted pin assignment tables and pin location figures for use in DDR2 DIMM signal identification, tracing, and troubleshooting |
TN-47-03 |
Aug 2004 |
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TN-47-04: Calculating Memory System Power for DDR2
- Details how DDR2 SDRAM consumes power and provides tools to estimate power consumption in a given system. |
TN-47-04 |
Jun 2006 |
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TN-47-05: Power Solutions for DDR2 Notebook PCs
- Provides a general guideline for designing the DDR2 memory power circuitry |
TN-47-05 |
Jun 2004 |
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TN-47-06: Updated JEDEC DDR2 Specifications (mods too)
- Covers the updated JEDEC specifications for systems using the initial DDR2-400 and DDR2-533 parts |
TN-47-06 |
Aug 2004 |
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TN-47-07: DDR2 Simulation Support
- Covers DDR2 simulation, adding to Micron's extensive array of design support tools for system designers |
TN-47-07 |
Aug 2004 |
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TN-47-08: DDR2 Package Sizes and Layout Requirements
- Covers DDR2 package sizes and layout requirements |
TN-47-08 |
Nov 2005 |
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TN-47-09: DDR2 SDRAM Bank Addressing (both)
- Describes the evolution in array architecture from DDR to DDR2 SDRAM |
TN-47-09 |
Dec 2004 |
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TN-47-10: DDR2 Posted CAS# Additive Latency (both)
- Describes the AL function of the DDR2 SDRAM device |
TN-47-10 |
Dec 2004 |
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TN-47-11: DDR2 Differential DQS both
- Describes the differential DQS function of the DDR2 SDRAM |
TN-47-11 |
Dec 2004 |
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TN-47-12: DDR2 Redundant DQS both
- Describes how to enable the redundant data strobe (RDQS) |
TN-47-12 |
Dec 2004 |
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TN-47-13: DDR2 Read Interrupt (both)
- Describes legal execution of a READ interrupted by a READ command |
TN-47-13 |
Dec 2004 |
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TN-47-14: DDR2 tCKE Power-Down (both)
- Describes the tCKE timing parameter of DDR2 SDRAM |
TN-47-14 |
Dec 2004 |
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TN-47-16: Designing for High-Density DDR2 Memory
- Focuses on designing for high-density memory—addressing schemes of each density, configurations, and the subtle differences between the 4-bank and new 8-bank DDR2 devices |
TN-47-16 |
May 2005 |
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TN-47-17: DDR2 SODIMM Optimized Address/Command Nets
- Provides the system-level designer with an overview of the DDR2 SODIMM family and offers insight into termination techniques utilized on the commands and addresses for these modules |
TN-47-17 |
May 2005 |
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TN-47-19: DDR2 (Point-to-Point) Features and Functionality
- Focuses on the unique memory requirements of point-to-point design layouts and describes DDR2 features and functionality. |
TN-47-19 |
Apr 2006 |
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TN-47-20: DDR2 (Point-to-Point) Package Sizes and Layout Basics
- General guidelines for developing the PCB floor plan. |
TN-47-20 |
May 2006 |
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TN-47-21: FBDIMM – Channel Utilization (Bandwidth and Power)
- Newly introduced FBDIMMs offer virtually unlimited scalability of density, a significantly reduced number of routed motherboard signals, and high bandwidth solutions, all with an extremely reliable channel protocol. |
TN-47-21 |
Oct 2006 |
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TN-47-22: Designing for 1.5V, Low-Power FBDIMMs
- Discusses memory power trends and identifies new low-voltage solutions for high-density DDR2 memory designs |
TN-47-22 |
Feb 2008 |
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TN-47-23: Advantages of DDR2 Differential DQS Signaling
- Focuses on the benefits the differential DQS signaling feature provides and explains how to design with it |
TN-47-23 |
Mar 2008 |
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