Overview

Featured Videos

Your Innovation, Our Memory

Your Innovation, Our Memory

Emerging technologies require innovation on a whole new scale. See how we partner closely with our customers to gain unique insights about how we can optimize our memory solutions to enable your innovations—and help you change the world.

View video
Memory for Automotive

Memory for Automotive

Technology is reshaping the concept of driving. Automakers are developing countless new driver-assistance features and systems. See how Micron’s memory solutions are helping to enable these new supercomputing capabilities.

View video

About Micron

Where there's memory, there's Micron

Engineered for Innovation

For more than 30 years Micron has redefined innovation by designing, developing, and manufacturing some of the world’s most advanced technologies.

Learn more
Elpida is Now Micron

Elpida Is Now Micron

With the combined strength of our products, technology, and team members—our customers now have access to the broadest portfolio of best-in-class technology.

About the acquisition

Welcome to My Workspace!

Create an account to access these benefits:

  • Save part pages
  • Save Data Sheets and other files
  • Create folders to organize your projects
  • Share folders with colleagues
  • Organize secure documents for easy access
  • "Follow" parts to see alerts and updates

Learn more about Workspace features

Don't have an account yet? Sign up

Already have an account?   Login

My Folders

Your workspace is your area to organize and save part pages, data sheets, and links for easy access in the future. You can even start by saving some of the pages you've recently accessed below:

My Workspace
N25Q 1Gb, 3V, Multiple I/O Serial NOR Flash Memory

Data sheet Uploaded 03/2014

Parts associated with this data sheet:
N25Q00AA13G1240E N25Q00AA13G1240F N25Q00AA13GSF40G N25Q00AA13GSF40F
Show More
Features

Features

Stacked device (four 256Mb die)

SPI-compatible serial bus interface

Double transfer rate (DTR) mode

2.7–3.6V single supply voltage

108 MHz (MAX) clock frequency supported for all protocols in single transfer rate (STR) mode

54 MHz (MAX) clock frequency supported for all protocols in DTR mode

Dual/quad I/O instruction provides increased throughput up to 54 MB/s

Supported protocols

Extended SPI, dual I/O, and quad I/O

DTR mode supported on all

Execute-in-place (XIP) mode for all three protocols

Configurable via volatile or nonvolatile registers

Enables memory to work in XIP mode directly after power-on

PROGRAM/ERASE SUSPEND operations

Available protocols

Available READ operations

Quad or dual output fast read

Quad or dual I/O fast read

Flexible to fit application

Configurable number of dummy cycles

Output buffer configurable

Software reset

3-byte and 4-byte addressability mode supported

64-byte, user-lockable, one-time programmable (OTP) dedicated area

Erase capability

Subsector erase 4KB uniform granularity blocks

Sector erase 64KB uniform granularity blocks

Single die erase (32MB)

Write protection

Software write protection applicable to every 64KB sector via volatile lock bit

Hardware write protection: protected area size defined by five nonvolatile bits (BP0, BP1, BP2, BP3, and TB)

Additional smart protections, available upon request

Electronic signature

JEDEC-standard 2-byte signature (BA21h)

Unique ID code (UID): 17 read-only bytes,
including: Two additional extended device ID bytes to identify device factory options; and customized factory data (14 bytes)

Minimum 100,000 ERASE cycles per sector

More than 20 years data retention

Packages – JEDEC-standard, all RoHS-compliant

L-PBGA-24b05/6mm x 8mm ( also known as LBGA24 )

SOP2-16/300 mils (also known as SO16W, SO16-Wide, SOIC-16 )

Products and specifications discussed herein are subject to change by Micron without notice. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur.

Device Description

Device Description

N25Q is a high-performance multiple input/output serial Flash memory device manufactured on 65nm NOR technology. It features execute-in-place (XIP) functionality, advanced write protection mechanisms, and a high-speed SPI-compatible bus interface. Innovative, high-performance, dual and quad input/output instructions enable double or quadruple the transfer bandwidth for READ and PROGRAM operations.

Features

The 1Gb N25Q is a stacked device that contains four 256Mb die. From a user standpoint this stacked device behaves as a monolithic device, except with regard to READ MEMORY and ERASE operations and status polling. The device contains a single chip select (S#).

The memory is organized as 2048 (64KB) main sectors that are further divided into 16 subsectors each (32,768 subsectors in total). The memory can be erased one 4KB subsector at a time, 64KB sectors at a time, or single die (256Mb) at a time.

The memory can be write protected by software through volatile and nonvolatile protection features, depending on the application needs. The protection granularity is of 64KB (sector granularity) for volatile protections

The device has 64 one-time programmable (OTP) bytes that can be read and programmed with the READ OTP and PROGRAM OTP commands. These 64 bytes can also be permanently locked with a PROGRAM OTP command.

The device also has the ability to pause and resume PROGRAM and ERASE cycles by using dedicated PROGRAM/ERASE SUSPEND and RESUME instructions.

3-Byte Address and 4-Byte Address Modes

The device features 3-byte or 4-byte address modes to access memory beyond 128Mb.

When 4-byte address mode is enabled, all commands requiring an address must be entered and exited with a 4-byte address mode command: ENTER 4-BYTE ADDRESS MODE command and EXIT 4-BYTE ADDRESS MODE command. The 4-byte address mode can also be enabled through the nonvolatile configuration register. See Registers for more information.

Operating Protocols

The memory can be operated with three different protocols:


  • Extended SPI (standard SPI protocol upgraded with dual and quad operations)

  • Dual I/O SPI

  • Quad I/O SPI

The standard SPI protocol is extended and enhanced by dual and quad operations. In addition, the dual SPI and quad SPI protocols improve the data access time and throughput of a single I/O device by transmitting commands, addresses, and data across two or four data lines.

Each protocol contains unique commands to perform READ operations in DTR mode. This enables high data throughput while running at lower clock frequencies.

XIP Mode

XIP mode requires only an address (no instruction) to output data, improving random access time and eliminating the need to shadow code onto RAM for fast execution.

All protocols support XIP operation. For flexibility, multiple XIP entry and exit methods are available. For applications that must enter XIP mode immediately after power-up, nonvolatile configuration register bit settings can enable XIP as the default mode.

Device Configurability

The N25Q family offers additional features that are configured through the nonvolatile configuration register for default and/or nonvolatile settings. Volatile settings can be configured through the volatile and volatile-enhanced configuration registers. These configurable features include the following:


  • Number of dummy cycles for the fast READ commands
  • Output buffer impedance
  • SPI protocol types (extended SPI, DIO-SPI, or QIO-SPI)
  • Required XIP mode
  • Enabling/disabling HOLD (RESET function)
  • Enabling/disabling wrap mode
Figure 1. Logic Diagram



Note

  1. Reset functionality is available in devices with a dedicated part number. See Part Number Ordering Information for more details.

Products and specifications discussed herein are subject to change by Micron without notice. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur.

Signal Assignments

Signal Assignments

Figure 1. 24-Ball LBGA (Balls Down)



Note

  1. See Part Number Ordering Information for complete package names and details.

Figure 2. 16-Pin, Plastic Small Outline — SO16 (Top View)



Note

  1. Reset functionality is available in devices with a dedicated part number. See Part Number Ordering Information for complete package names and details.

Products and specifications discussed herein are subject to change by Micron without notice. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur.