FAQ Category

General Product Information FAQs

Recent Questions

• Where can I get support for my Micron PC or MPC computer?
  
• Where do I get a RoHS Certificate of Compliance?
  
• What is the impedance tolerance of the driver in match-impedance mode relative to the expected value base on the perfect reference resistor connected to ZQ pin?
  
• What is meant by "In Development," "Advanced," "Sampling," "Production," "Not Recommended," "End of Life," or "Obsolete," part status?
  
• Should the ECC memory chip share chip select and CKE signals with the other two main memory chips in our point-to-point application?
  
• Can I re-assert VREF and bring the part out of self refresh?
  
• Is VREF required during self refresh? I would like to put DDR memory in self refresh mode and turn off power to the CPU (the system is battery-operated). Can I disable VREF and still have correct self refresh operation?
  
• Does thermal information change for IT parts?
  
• My design was based on a specification stating the JTAG was relative to VDD (1.8V), but now we’ve discovered that JTAG is actually relative to VDDQ (1.5V). It’s a fairly significant board spin to change this; what do I risk by leaving the design as-is? I assume that the specification is still for VDDQ + 0.3V = 1.8V, but with CMOS parts there’s no way I can guarantee that it won’t swing past that on transitions.
  

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• Where can I get support for my Micron PC or MPC computer?
  
• What is meant by "In Development," "Advanced," "Sampling," "Production," "Not Recommended," "End of Life," or "Obsolete," part status?
  
• Is VREF required during self refresh? I would like to put DDR memory in self refresh mode and turn off power to the CPU (the system is battery-operated). Can I disable VREF and still have correct self refresh operation?
  
• Where do I get a RoHS Certificate of Compliance?
  
• Does thermal information change for IT parts?
  
• Should the ECC memory chip share chip select and CKE signals with the other two main memory chips in our point-to-point application?
  
• Can I re-assert VREF and bring the part out of self refresh?
  
• What is the impedance tolerance of the driver in match-impedance mode relative to the expected value base on the perfect reference resistor connected to ZQ pin?
  
• My design was based on a specification stating the JTAG was relative to VDD (1.8V), but now we’ve discovered that JTAG is actually relative to VDDQ (1.5V). It’s a fairly significant board spin to change this; what do I risk by leaving the design as-is? I assume that the specification is still for VDDQ + 0.3V = 1.8V, but with CMOS parts there’s no way I can guarantee that it won’t swing past that on transitions.
  

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