Micron Blogs - Innovations and Trends

Contemplating the Future of Computing

Tue, 30 Apr 2013 08:07:00 -0700

I spoke Friday at the IEEE Workshop on Microelectronics and Electron Devices (WMED) in Boise about a memory-centric vision for the future of computing. This was my first time at this workshop, and I was very impressed by two things: the high caliber of the talks and the fact that the workshop had strong representation from students at all levels. Coming from the high-performance computing community—which tends to be a somewhat more distinguished, somewhat greyer crowd—seeing a strong student presence was refreshing!

John Knickerbocker from IBM gave a particularly thought-provoking talk on the future of 2D, 2.5D, and 3D integration as ways of combining heterogeneously fabricated elements (logic, memory, MEMS, and other sensors, potentially silicon photonics). The kind of close proximity enabled by these methods is fundamentally critical to the future of computing. Proximity is one of the few ways to significantly decrease the energy required for communication between modules in a computer—which is the key factor in power consumption, regardless of a computer’s scale (mobile phone to supercomputer). With servers consuming up to 1.5% of the world’s power (see Growth in Data Center Electricity Use 2005 to 2010 [updated 2011]), this is a big deal.

Work in advanced technologies like processing-in-memory (PIM) is about performing computation in less energy than it takes to drag the data between a standard memory module and a processor module.

Another dominant and interrelated theme is the change in Moore’s Law that has occurred since 2003. Performance doesn’t simply come “for free” by waiting anymore, so we’re looking to new architectures for an overall improvement in end-user application performance. There was a lot of talk about potential new memory devices, but more than that, there was an air of opportunity about the creation of new architectures capable of addressing problems not well solved by today’s computers.

One repeated theme was human-cortex-inspired computers, which despite being slow, show tremendous 3D structure and interconnectedness. To paraphrase one speaker, they may not be able to diagonalize a matrix better than a von Neumann computer, but they have tremendous capabilities in pattern recognition and other extremely important large-scale data analytics.

The potential for enabling computing in the post Moore’s Law era is in solving the heterogeneous integration problem, which, in turn, enables us to less expensively explore the kinds of architectures capable of addressing workloads that have become more about exploring connections and patterns than traditional science calculations.

The human cerebral cortex is the ultimate example of this: Tens of billions of neurons, each of which has on the order of 50 degrees of freedom, which produce a whopping 6 bits of information. In terms of storage, this is less than a petabyte of information total, which is an achievable goal for silicon systems today using commodity NAND Flash storage. The complexity and power arises not in the raw storage of information, but in how that information is applied.

All in all—pretty heady stuff! Look for more highlights from future events…

The HMC Consortium Sets a New Milestone

Wed, 03 Apr 2013 12:29:00 -0700

With the HMC Consortium’s first specification final and publicly available, the organization is meeting today to determine next steps for the 2013 working year. Basically, the group will be working on extending the SR PHY spec to reach a signaling rate up to 28 Gb/s and the ultra-short reach PHY to 15 Gb/s. The goal is to have a second-generation spec published by early 2014.

e•MMC—An Ideal Solution for Memory-Hungry Automotive Applications

Tue, 12 Feb 2013 11:38:00 -0800

Many car buyers today care more about the infotainment technologies embedded in the dashboard than what’s under the hood. Users want to be connected and have convenient access to their personal content anywhere, anytime, on all of their devices. Their vehicles become just another node in the network, an extension of the user’s digital and social lifestyle. A “connected” car is safer, more comfortable, and more energy-efficient, equipped with early access to important information such as weather reports, traffic jams, or road accidents.

A recent Gartner Research study¹ confirmed that electronics are playing a major role in the advancement of automotive technology. Electronic content in cars has been steadily increasing since the first digital engine control modules were introduced in the 1980s. This trend will accelerate as advances in semiconductor technology continue to drive down the cost of various electronic modules and subsystems. With 60% of new cars expected to be connected by 2017, this megatrend is driving an explosive growth in both volatile and nonvolatile memory. New memory solutions, specifically tailored for automotive infotainment systems, are needed to provide additional storage space for rich multimedia data and advanced software and applications. In fact, the automotive segment is anticipated to be the fastest-growing market for memory solutions, growing at 9% year-over-year from 2011 to 2015.

As the innovation cycle becomes shorter and shorter, designers need “drop-in” memory solutions that are not only easy to implement, but also can meet the rigorous automotive-grade certifications for temperature and reliability. The embedded multimedia card (e•MMC) device is an interesting option—it has all the features needed to support navigation and infotainment applications such as detailed 3D maps, traffic monitoring, meteorological information, car radio and multimedia, e-call, and voice recognition. As a standardized version of the managed NAND memory architecture, it is essentially a module based on a bank of nonvolatile NAND Flash devices, internally managed by an ad-hoc microcontroller. The primary advantage to the user is that an e•MMC memory is fully managed and independent from the NAND technology inside. e•MMC memory is backward-compatible and has a standard interface so that developers don’t have to bother with dedicated software to manage the complexity of NAND Flash.

In terms of quality and reliability, the power-loss protection of NAND is just the beginning. Special features have been incorporated into e•MMC architecture to meet automotive requirements—an enhanced package with dedicated test-pads for failure analysis, non-controller-based access to the NAND for memory-bank testing, and an extended temperature range of –40°C to +85°C.

Micron offers e•MMC in a wide range of densities, 4GB–64GB (roadmapped to 256GB), with an integrated 16-bit NAND controller for more robust management and memory optimization compared to discrete NAND devices. All of Micron's e•MMC devices are available in JEDEC-standard 100-ball, 1mm pitch and 153-ball/169-ball, 0.5mm pitch BGA packages, easing the design and validation process that is critical to the fast pace of product development in the automotive segment.

Micron has been a leading supplier of memory to the automotive industry for more than 20 years and has developed an in-depth understanding of the needs of the segment. Our newly opened lab in Munich, Germany is purely dedicated to automotive applications—stay tuned to see what cost-efficient, leading-edge products they develop!

¹Hype Cycle for Automotive Electronics 2012, James F. Hines, Gartner, October 4, 2012.

Other market data and stats included in this blog are estimates and evaluation by Micron, based on publicly available sources and internal intelligence.

"Paying Our Dues" Paid off with PCM

Mon, 21 Jan 2013 07:00:00 -0800

“I commend Micron for being able to put silicon down and show volume production of PCM. This blows naysayers away—of which I was one—and shows that the technology can work. It also drives home the lesson that you must pay your dues in terms of development and production time—including the ability to work around a variety of issues like thermal disturb—to achieve a good, production-ready, innovative design.”

- Alan Niebel, CEO of Web-Feet Research

In December, we announced our second phase change memory (PCM) product, a 512Mb part made with our proprietary 45nm PCM technology, and confirmed we’re shipping high volumes of our first PCM product, the 1Gb part, to Nokia.

It doesn’t happen very often that a radically new technology starts to play a significant role in the highly competitive memory field. The last time that happened was the introduction of NAND Flash more than 10 years ago, and 10 years prior to that, the introduction of NOR Flash.

Web-Feet Research CEO Alan Nieble, who definitely has a long experience with and deep understanding of memory, especially nonvolatile memory, has recognized that we are at an inflection point in the history of long-awaited emerging technologies. He commended Micron for making it happen with PCM.

But Alan has captured an important point—it is always true that “you must pay your dues in terms of development and production time,” even when progressing from one node to the next node on a memory roadmap. But when it’s time to move from an evolutionary innovation to a revolutionary innovation, the dues are far higher.

It’s radical change of paradigm. As far as discontinuity, the distance of PCM from any conventional nonvolatile memory is orders of magnitude larger than, for instance, the gap between NOR Flash and NAND Flash, or between planar NAND and 3D NAND.

For more than 40 years, engineers and designers have been playing with electronic devices, charge storage, potential barriers, electric fields, and electrical capacitances. The 10 years Micron has spent on phase change memory was invested in learning how to work with thermal devices, phase transition, latent heat, heat diffusion, and thermal capacitances. We basically had to change our mindset—from electronic engineering to phonon engineering.

And…we made it!

That we can now produce PCM in high volumes, with industry-standard yield, high performance, and high reliability, is thanks to the huge effort and the long hours our engineers spent digging into material properties, physical mechanisms, and process details to build a solid understanding that could be translated into design and manufacturing skills.

You are perfectly right, Alan—we had to pay our own dues! But we’re proud that we reached the finish line first.

Dean’s List – Observations from CES 2013

Wed, 16 Jan 2013 11:02:00 -0800

3,100 exhibitors, 150,000 attendees and 100 breakfast-buffet options. What could it be but the 2013 Consumer Electronics Show, an event that surely must be the bane of every stiletto-heeled exhibitor and the boon of podiatrists worldwide? Last week I attended two days of this annual electronics mega-festival and had some time between meetings to catch the spirit of the event and take a peek at some of the promised technology. My feet may never be the same.

First general impression: this show was massive. In two days I could not really do it justice, so I focused on the Las Vegas Convention Center and nearby exhibits. The show was packed. There were many times when I felt more like a part of a herd than a hunter (a technology hunter, that is!). There were a few duds. Among all the rows and crowded booths I occasionally ran across a nearly empty booth. The USB Techzone was an entire area dedicated to no-shows, I guess.

Some of the technologies that caught my eye were OLED displays, 4K and 8K displays, Nvidia and Qualcomm processors and action cameras. Let me explain.

OLED displays. Organic light-emitting-diodes have been the hot, upcoming, display technology for at least three years at CES. This year there were 55” production units on display, and they were pretty impressive. (And pretty!) The colors are really rich on these displays. The screens can also be very thin, in part because they don’t need a backlight. Also very interesting were curved displays from at least three vendors. This works for OLEDs because the manufacturing process doesn’t need to have a flat substrate like a normal LCD panel. I can’t say that the curved displays are really that practical for TV applications, but for mobile applications these could be interesting. Certainly one of the more promising features of a curved OLED is that it might also be flexible, thus ending the era of cracked displays on dropped cell phones.
4K and 8K displays. Yes, you just upgraded your home TV to a 1080p high-definition beauty. Yes, you’ve upgraded your DVD player to a Blu-Ray® player so you can watch your favorite movies in high-definition glory. Yes, you are now officially out-of-date. 4K and 8K are the new ultra-high-definition TV standards that are going to try and get you to open your pocketbook and upgrade your TV again. These screens are truly impressive, and the detail is amazing. A 4K display has twice the resolution in each direction as your 1080p HD display. Correspondingly, an 8K display doubles each of these again. However, when looking at the Sony implementation, I noticed something very distracting. The content they were displaying had a very narrow depth-of-focus, which made most of the image deliberately out-of-focus—which seemed a bit counterproductive!

One implication for us is that with increased resolution comes a need for increased memory. The 4K display itself will require 4X the internal memory of today’s 1080p HD display. The 8K display will require 16X the memory of today’s 1080p display. Of course, the rest of the system that delivers content to these ultra HD displays needs more memory, too. How much? Probably about 40% more for 4K, because compression standards have improved. Going from 4K to 8K should be a bigger jump. Speaking of Blu-Ray…
Blu-Ray MIA. OK, I’ll admit it: I’ve never been a huge fan of Blu-Ray. Discs get scratched, smudged and cracked. Give me solid-state storage or streaming delivery! For three years now, I have watched portable and automotive disc players for any sign of Blu-Ray. This year even Sony admitted that their future is in content delivery from cell phones or tablets. Score one for NAND!
Application processors. Big and busy. That would describe the booths of Qualcomm and Nvidia. Qualcomm had just released their Snapdragon™ 800 app processor for tablets and cell phones, and it was generating quite a buzz. I don’t recall ever seeing so many people lined up to see a CES silicon demo where there wasn’t some freebie being given away. Nvidia was also showing some of their applications in the automotive arena, where touchscreens are replacing mechanical knobs and dials for dashboard applications.

But back in the Qualcomm booth, tucked away to the side, was a small area dedicated to showing off some of the projects of Qualcomm Labs, an advanced development team bringing cutting-edge technology to market. In past years, this has always been a secret treasure trove, so I make it a point to see what they are cooking up. This year it was shades of George Orwell, with their creation of a software development tool for applications that gives the application all sorts of context information. This context information can be gleaned from the user’s email, text messages, location, numbers dialed, and the like. This is, of course, not unlike what Google does, and as you might predict, the 20-something-year-old whippersnapper describing this to me saw nothing wrong with it. I guess I am truly from another generation.
Action cameras. One of the busiest booths I saw at the show was the GoPro booth. GoPro makes wearable, waterproof, high-definition sports cameras and accessories. But it wasn’t just GoPro that was busy. Some of their competitors were doing quite well, too. And if imitation is the sincerest form of flattery, GoPro must indeed be feeling flattered.
USB Flipperizer™. In the category of “Duh—why didn’t I think of that?” was the USB Flipperizer. This little gadget is a connector that you can plug onto your favorite USB widget, which then allows you to plug into your computer or other USB port either way. That’s right. There is now no right-side-up or -down. As a stand-alone product, it really is about as cheesy as its name, but interesting, anyway…

There really is so much I could continue on with, but let me leave you with a few closing thoughts. First, consumer electronics are alive and well. There is no shortage of innovation in this space, and it is these innovative devices that are enticing people worldwide to open their wallets and part with their euros, drachmas and dollars. Based on this show, it sure seems that the global economy is going to do just fine. Second, our digitization is complete, and it is demanding. Film and analog TV have long since been dead, but what we are seeing now is the explosion of precision digital data. Higher-resolution TVs, knob-free dashboards on self-driving cars, higher-resolution and faster-frame-rate sports cameras, context-aware applications—all of these are just the tip of the iceberg on top of the hidden mountain of digital data that makes it all happen. In the memory world, we can all sleep easier knowing that the demand for memory to move, manipulate, manage, and store this mountain of data is continuing to grow faster than we can imagine.

Transforming the Ultrathin Experience, Part 1

Tue, 15 Jan 2013 14:26:00 -0800

How do SSDs help your ultrathin be even more ultra-mobile? Two ways: form factor and power savings.

In today’s era of portability, the days of lugging an 8 or 10lb laptop through the airport are over. SSDs come in slim, caseless, and lightweight form factors that take up less space, enabling even sleeker ultrathin designs. Our mSATA SSDs measure in at about one-third the size of a credit card, while our incredibly small M500 M.2 form factor is about the size of a stick of gum!

Speaking of batteries, SSDs also use significantly less power than hard drives, freeing you from being tethered to an outlet for frequent recharging.

Learn how Micron SSDs optimize ultrathins and watch our video, “Rock Solid—Solid State Drives for Ultrathins.”

Gaming Goes Mobile—with Micron Memory Onboard

Thu, 27 Dec 2012 00:00:00 -0800

With the proliferation of mobile devices, gaming has broken its tether to the living room and is now enjoyed everywhere. In fact, according to the latest study from the NPD market research group, 59% of total game play is done on a mobile device. Market research firm Mintel found that 38% of tablet gamers and 20% of mobile phone gamers are playing five or more hours per week. Gaming is clearly a trend that is here to stay.

Additionally, gaming graphics continue to become more detailed, life-like and real-time, requiring high-end graphics cards, lightning-fast CPUs, and large amounts of memory to access frequently used information or programs.

Made for One Another: SSDs and Ultrathins

Wed, 19 Dec 2012 12:48:00 -0800

As the landscape of personal and mobile computing continues to intersect, our storage devices are becoming smaller and lighter while boosting system performance and adding features.

Ultrathin notebooks are a new breed of mobile devices that boast the portability of a tablet and the power of a laptop. The broad range of the target market, from business people to college students and even children, means that ”the inside” needs to be tough, versatile, and can’t compromise on speed. SSDs have several of these traits and others that make them ideal for ultrathins:

Performance – Because SSDs don’t have any mechanical moving parts to slow things down, they respond at the push of a button, providing instant-on responsiveness and nearly instantaneous application load times.
Battery Life – SSDs require less power to operate, which helps extend battery life.
Rock Solid – Thanks to their simple design, SSDs are rugged, reliable, and resistant to the common drops, bumps, falls, shocks, temperature swings, and vibrations that are inevitable with daily use.
Portability – Smaller and lighter than HDDs, SSDs are designed with mobility in mind.
Peace and Quiet – With no noisy spinning parts, SSDs are silent.

The Ultrathin class of devices is still in its infancy, yet growing rapidly. As the market progresses to undoubtedly lighter and sleeker machines, Micron will continue to meet the demand with industry-leading SSD solutions.


Discover how an ultrathin notebook with a solid state drive can transform the way you work.	Lobbying for a new computer? Don't forget the solid state drive (SSD). SSDs replace hard drives (storing all your files) and make computers faster, lighter, and more power-efficient.

DDR4 Gathers Momentum

Thu, 13 Dec 2012 10:18:00 -0800

Back in May 2012, we announced our first fully functional DDR4 module. Since then a lot has happened.

For starters, our DDR4 modules were selected as one of the year’s most compelling products by EDN.

And there’s more. Since the JEDEC DDR4 standard was published on September 25, 2012, we’ve been actively engaged in supporting educational and outreach activities for the new standard, including presenting at ongoing workshops in Santa Clara and Taiwan where participants learn about DDR4’s device operation, migration issues, and numerous features that address reliability, speed, power, and stacking capabilities.

One slick new feature of the DDR4 standard is the inclusion of Connectivity Test (I.e. boundary scan) for memory down applications. Connectivity Test (a type of JTAG) enhances device and/or module manufacturing testing by enabling early fault detection, which reduces time spent on debugging, improving system reliability, and ultimately saving development and production costs.

For more information on this DDR4 capability, compare DDR3 to DDR4.

So what’s next? More DDR4 information—including Verilog models, IBIS models, data sheets, Power Calculators, etc.—coming to micron.com in January.

Look Out Laptops; Ultrathins are Moving In

Wed, 28 Nov 2012 15:43:00 -0800

The brutal fight to stay relevant in the rapidly changing client computing market spurred CPU vendors and computer OEMs to rethink their approach to personal computing. They went back to the drawing board and began defining new form factors, energy-efficient processors and systems, and touch displays.

The Intel-inspired Ultrabook™ devices are breaking new ground for powerful, sleek, power-efficient ultrathin laptops. ARM vendors, who traditionally played only in the mobile segment, have made tremendous leaps forward in enabling new ultrathin products with their ability to run Windows RT™. The result is a host of ultrathins, convertibles, and tablets (Ultrabook or non-Ultrabook) with detachable keyboards and docks that are transforming traditional laptop content extraction devices into ultrathin content creation devices.

With global tablet shipments expected to nearly double between now and 2015 and 25% of all laptop users projected to be using an ultrathin device within that same time frame, it’s clear that consumers are ready for something that maximizes mobility and portability without compromising performance. They’re ready for something ultrathin.

Find out how Micron is helping to deliver the ultimate ultrathin experience.

SC12: Dean's List

Thu, 15 Nov 2012 12:39:00 -0800

Just back from SC12, the huge show highlighting huge computers capable of tackling huge problems while ringing up huge power bills. There, you have the highlights in a nutshell! :) Compared to shows like the Consumer Electronics Show, SC12 isn’t really that big. But the event filled up most of Salt Lake City’s “Salt Palace” convention center which showed that “Big Iron” scientific computing is alive and well and definitely has a lot of interest. The show featured numerous speakers (including our own Todd Farrell), discussion forums and a huge exhibition floor. I spent some time on the exhibition floor and came away with these observations:

Memory is still a hot topic for HPC (High Performance Computing). There was, as always, a lot of hardware on display at the show. The importance of memory could easily be seen in the makeup of the hardware. On most systems the CPU was easily identified, and for each CPU chip on the board there was a corresponding set of DIMM modules loaded up with memory. In most cases there were 8 DIMM modules per CPU and in all cases the modules were buffered modules. In the presentations and in talking with engineers, the topics of memory density and energy are still most concerning. Below are a couple pictures of some of the systems.


Figure 1: AMD CPU with Micron memory	Figure 2: Fujitsu with Micron memory

GPU’s are hot. There was a new Top500 list released on Monday at SC12. The reigning Top500 machine, Lawrence Livermore’s IBM BlueGene-Q “Sequoia” was dethroned by the newly-upgraded Oak Ridge National Labs “Titan” Supercomputer. Titan is a Cray XK7 and features more than 260,000 Nvidia Kepler GPU accelerators for a total of over 560,000 processors. Thank goodness they can draw power from the Tennessee Valley Authority! Titan’s new speed record was 16.6 Petaflops, which means a little under 17 million billion floating point operations per second. A big number.
Intel is taking HPC seriously. Cray, a longtime AMD fan, was showing off a new machine based on Intel Xeon E5 processors. I queried them about deployment of the new hardware and they told me to wait and see. But besides having replaced AMD, there were other signs of Intel’s interest in this space. There are now two Intel Xeon E5-based systems on the Top500 list. The new number 7 is perhaps the most interesting as it is made up of Dell PowerEdge servers with the hot new Intel Xeon Phi accelerator boards installed. Xeon Phi isn’t really a typical CPU in the Intel family of CPU’s. This is the chip formerly known as MIC (Many Intel Core) or alternatively as Knight’s Corner. This chip is a peripheral to a server CPU and incorporates 60 X86 processor cores and support circuitry. Oh yes, these chips have a set of memory controllers, too. You might view the Xeon Phi as Intel’s answer to the GPU: A peripheral to the main CPU that is good for crunching numbers. But perhaps Phi is good for other things as well. For this we’ll have to wait and see. Below is a picture of Cray’s new board with Intel Xeon E5 processors.

Figure 3

AMD is suffering in HPC (see Figure #3). AMD has been a longtime favorite of the supercomputing community. AMD was first to address the “memory wall” when they introduced processors with memory controllers built in. With Hyperchannel, AMD had a solution to allow scaling to greater numbers of CPU chips in a system. For supercomputers that needed epic amounts of address space, AMD was first with a 64-bit instruction set. If “imitation is the sincerest form of flattery” (credit: Charles Colton), AMD must be truly flattered. Well, now it appears they are about to be flattened. With the Intel juggernaut focused on this space AMD will find the going to get tougher. Hot off the press: AMD is apparently shopping around for a buyer. Not a good sign.
But, watch this space. ARM is coming! Here’s the wild card. Could it be that Intel’s reign in supercomputers will ultimately be threatened by the lowly CPU core that has made smartphone smart? It’s no secret that some of the biggest names in servers are fielding “micro-servers” based on ARM CPU technology. So far, these systems have used 32-bit ARM cores, which severely limits the upward mobility of these servers. ARM has now introduced their 64-bit IP cores and that means 64-bit server-capable chips won’t be far behind. One of the major (but little) players in ARM-base server chips is Calxeda, who is one of the companies working fast and furious to bring 64-bit ARM to the server masses. ARM is attractive in this space due to the same reason it was a winner in cell phones: Energy. Low energy is very important in the supercomputer and server space. Energy is a major component of the total cost of ownership for these machines. Consider that a large datacenter can consume upwards of 20MW per year, and each MW can cost over $1M and you can see why energy matters.

Some final thoughts:

I like GPU’s as much as anyone, but frankly, I’m concerned with the results I see. Sure, the GPU-equipped Titan offers impressive performance, but it does so with increased energy consumption. If we look at the performance gain over the previous #1 (Lawrence Livermore’s “Sequoia”), the gain is less than 8% in performance at a 4% increase in power consumption. Clearly this is not a trajectory that’s going to get us to a viable Exascale-class supercomputer with a viable energy bill. Exascale machines are supposed to be capable of a billion-billion floating point operations per second with a power consumption of under 20MW. We need bigger improvements in performance and power. One additional concern on GPUs: Not a single GPU-based system showed up on the Graph500 list. What does this mean? Many experts consider the Graph500 benchmark to be more representative of most real-life applications. The Top500 benchmark is Linpack, which is very floating-point intensive. What type of system do you want to run your datacenter? Unless you’re computing fluid dynamics, climate simulations or protecting a nuclear stockpile you might want to go for the Graph machine. Of course, this does make me wonder about the pursuit of Exascale floating-point performance…

If you looked carefully you would see that many of the Intel-based supercomputers use Intel’s Xeon E5 instead of the Xeon E7 processors. The E7 is the higher performance part, Intel’s flagship CPU, yet these machines are using E5 processors. I asked two different companies why their systems didn’t use the E7 and I received the same answer from both: price. So while performance is paramount in these systems, price is more important. How much of a price delta are we talking about here? Intel publishes the single-unit list price of their processors and if I compare a Xeon E7-8860 to a Xeon E5-4610 I see list prices of $4016 and $1219, respectively. (Other part numbers can have larger or smaller deltas.) Maybe there’s something more subtle here than what we see in just the price. The lower-rated E5 processor actually has higher CPU-CPU bandwidth than the E7. Both CPU’s can control over 1TB of memory, but the memory frequency (and thus bandwidth) is 25% faster for the E5. I’ll leave you with this closing thought: It’s about the memory. :)

Dean

ISC12: insideHPC at the Micron Booth

Mon, 02 Jul 2012 11:08:00 -0700

A week after ISC’12 and the buzz continues! Last Wednesday, after my session on Large Memory, Rick Brueckner from insideHPC caught up with me in the ISC Exhibition Hall at the Micron booth. Obviously, insideHPC tracks the top trends in the High Performance Computing space, so it was natural that they should come to a memory company to talk trends. When looking around the exhibition hall there were a lot of high performance systems on display and most of them had their lids off and were showing off the silicon inside.

One recurring theme in all the different systems was that these systems are chock full of memory modules. Rich asked me a few questions about these modules and what Micron does in this space. So it was a good time and place to talk about DDR3, the new load-reduced DIMMs, upcoming DDR4 and HMC. Then Rich asked me about storage. This turned out to be convenient, since we were standing right in front of our enterprise storage display. I pointed out the enterprise MLC SSDs, the high performance SLC SSDs and the PCIe SSDs (always a favorite!) We’re uniquely positioned providing the range of memory and storage solutions for this HPC market and I think Rich was pretty excited to learn a bit more about Micron. The next morning I was sad to leave Hamburg. Next year’s ISC’13 will be in Leipzig, and I may never return to the beautiful city at the mouth of the Elbe river. But I had four more cities to visit on my European trip, so auf Wiedersehen, Hamburg!

ISC12: The Future of Supercomputing

Mon, 25 Jun 2012 12:33:00 -0700

In Friday’s blog post, we talked about how the U.S. recaptured the Top500 supercomputing lead with the IBM-Lawrence Livermore system named Sequoia. But Fujitsu, creator of last year’s top supercomputer, K, hasn’t been standing still in this department. The K supercomputer at the RIKEN Advanced Institute for Computational Science in Kobe, Japan turns in a respectable Linpack score of 10.5 petaflops and a computational efficiency of more than 93%.

I stopped to chat with the Fujitsu team about their next step and was pleased to see another system chock-full of Micron memory. What they showed me was their next-generation node card, called the FX10. This board doubles the cores per CPU chip from the FX9 that was used in K. They hinted that there is a new machine coming based on FX9 that they expect to retake the lead with.

Some of you may recall that I’ve mentioned GPU-based computing for supercomputers in the past. There was a lot of talk about GPU computing here again. I even sat through an Nvidia presentation where they claimed to be the energy-efficiency leader, showing energy figures that were higher than the IBM BlueGene-Q. It’s also worth noting that this year’s Top500 list has more GPUs than last year, but the number in the top 10 has gone from three to two. Of course this will change either later this year or early next year, when the Oak Ridge National Laboratory’s Jaguar supercomputer gets through its upgrade with its Nvidia 2090 GPUs.

One other interesting metric to note is that the computational efficiency (Rmax/Rpeak) for the GPU-based machines is a lot lower than other supercomputers, with scores of around 50%. Don’t get me wrong; I’m not down on the GPUs, but they have some hurdles to overcome if they are going to be the viable path to exascale (10^18 FLOPS). My hypothesis is that they may be able to improve with better programming tools, but also that they could use better access to high-speed memory. I chaired an ISC session called “Large Memory Systems and Challenges.” In my introductory comments, I focused on the economics of memory and the opportunity of memory. My three speakers were Shawn Strande from the University of California–San Diego, Dr. Bruce Jacob from the University of Maryland, and Dr. Richard Murphy from Sandia National Laboratories. Shawn is the project manager for the Gordon supercomputer, a machine that is unique in its incorporation of Flash memory. Gordon is called a “data-intensive supercomputer.” Dr. Jacob is no stranger to Micron; he’s an expert on memory performance and system modeling. Dr. Murphy discussed the applications view of memory. Both Dr. Jacob and Dr. Murphy pointed to the Hybrid Memory Cube as a necessary ingredient in future high-performance computing. Well, it’s been a great show and a great place to connect with some of the thought leaders in the high- performance computing space. But now I’m off to England—so long, Hamburg!

ISC12: Clocking Sequoia, the World's #1 Supercomputer

Fri, 22 Jun 2012 11:49:00 -0700

In yesterday’s post, I promised to dish on what I learned about the new #1 Top500 supercomputer, Sequoia, from the IBM and Lawrence Livermore National Labs folks who built it. Sequoia is built around IBM’s Power6 CPU and BlueGene-Q architecture. This CPU has 18 cores on a chip, with one core dedicated to running Linux, one core for a spare, and 16 cores dedicated for computation. The CPUs are clocked at a conservative 1.6 GHz and are water-cooled. The CPUs are assembled onto a module that contains one other significant feature—72 DDR3 memory devices. Most notable for me was that these were Micron memory devices. According to IBM, the aggregate bandwidth of the CPU chip clocks in at just over 42 GB/s. The CPU heat sink extends over the memory on one side of the module, providing water cooling for the memory, too. IBM says the machine is 90% water-cooled and 10% air-cooled, which makes the machine pretty quiet, unlike most servers. Nice! (Or cool!) Besides taking the performance crown, IBM is also claiming the energy-efficiency lead with the BlueGene-Q architecture. My calculations show Sequoia to be a “modest” 0.483 watts per floating point operation (FLOP), which is less than half that of the Japanese K Computer that held the top ranking in 2011. Sequoia’s combined 1.5+ million cores(!) and 1.6 million gigabytes (1.6 petabytes) churn out a peak performance of over 20 petaflops (20x10^15 PFLOPS) and a Linpack benchmark score of over 16 petaflops. That nets out to a computational efficiency of about 80%, a good score. IBM claims this architecture can scale to 100 PFLOPS (peak), but could anyone afford the 40MW power bill? It is worthwhile to note that there are now four IBM BlueGene-Q supercomputers in the top 10 of the Top500 list (#1, #3, #7, and #8). A very impressive showing for IBM! Stay tuned for the next blog post to find out about Fujitsu’s supercomputing efforts, plus the latest on future supercomputing technologies.

ISC12: Supercomputing Takes Center Stage

Thu, 21 Jun 2012 13:46:00 -0700

Much to report on from ISC12 in Hamburg, Germany. The weather’s been good, and the food is… German, which means good and rich! But the memory here is what’s really impressive. This is a supercomputer show, and while the CPU and GPU vendors are all bragging about their latest advances, the role of memory in these impressive machines cannot be underestimated. The new Top500 supercomputer list was announced earlier this week. The Fujitsu-designed K supercomputer has enjoyed a year on the top of the heap, but the new king of the hill is the IBM-built Sequoia supercomputer, just brought online at Lawrence Livermore National Labs in California. I spent some time with the folks from Lawrence Livermore and IBM digging into this supercomputing solution—stay tuned for tomorrow’s blog post to find out what I learned!

Check out Micron's Events page for more information about ISC12.

Don’t Miss Micron’s Take on DRAM and NAND Markets

Mon, 07 May 2012 15:21:00 -0700

Want to learn more about changing DRAM and NAND markets? The VPs of Micron’s NAND and DRAM solutions groups are presenting at two financial conferences this week. Don’t miss your chance to listen to the latest updates on memory and storage trends and how Micron is driving memory architecture.

Jefferies 2012 Global TMT Conference: Tuesday, May 8, 9:30 a.m. ET

Who: Brian Shirley, VP & GM of Micron’s DRAM Solutions Group

Topic: DRAM segment and technology trends, Micron’s presence in infrastructure space, and future memory trends.

Audiocast: http://investors.micron.com/eventdetail.cfm?EventID=110347&calendarid

Bank of America Merrill Lynch 2012 Global Technology Conference: Wednesday, May 9, 2:45 p.m. PT

Who: Glen Hawk, VP of Micron’s NAND Solutions Group

Topic: Global NAND market outlook, trends driving new storage consumption, and Micron’s silicon-to-systems strategy.

Audiocast: http://investors.micron.com/eventdetail.cfm?EventID=110348&calendarid

Audio from the sessions will also be archived on Micron's Investor Relations website (investors.micron.com) and available for replay later.

20nm NAND: 2011 Semiconductor of the Year

Tue, 17 Apr 2012 10:58:00 -0700

Memory doesn’t always get its due. It’s a foundational computing element and one of the key reasons everything is smaller, lighter, and faster than it used to be, but it’s usually the processors and end applications that get the credit. So when our JV with Intel pushed NAND to 20nm well ahead of competitors, we didn’t expect broad public acknowledgement. Today, our hardworking R&D teams get a little much-deserved recognition.

After analysis of more than a dozen competing technologies, UBM TechInsights has named Micron and Intel’s 20nm NAND technology Semiconductor of the Year. It’s a huge honor. The Insight Awards have been around for a decade and are highly respected in our industry, in no small part because their analysis is so technically insightful and thorough (see their EETimes Article for a brief sample).

But the award isn’t just interesting for those who can appreciate elegant semiconductor architecture—our breakthrough design has a real impact for end-users. The innovative cell architecture will allow 20nm NAND to closely match the performance and endurance rates of the last generation when it’s fully mature (that’s unheard of for NAND). It’s exactly those features that will drive even greater NAND adoption in the years ahead—and that’s the mark of a truly great technology.

Read the Press Release, learn more about our NAND process technology, or watch the video below for highlights from this morning’s awards ceremony.

An Engineer’s Dream Come True: HMC named “Best Technology of 2011”

Mon, 30 Jan 2012 13:11:00 -0800

When you’ve invested a lot of hours and hard work into developing a new technology, it’s rewarding when your labors get noticed. That’s why we were especially excited when our Hybrid Memory Cube (HMC) received some really BIG attention, The Linley Group’s Analysts’ Choice Award for “Best Technology of 2011.”

HMC has been in development since 2006 and represents the combined efforts of three cross-functional teams: logic layer designers, DRAM design engineers, and our advanced packaging team. These teams were challenged to think beyond the evolutionary path of memory and focus on developing a technology that would overshoot industry expectations in terms of raw bandwidth and energy efficiency—an engineer’s dream come true! One of the more unusual challenges we faced was how to test HMC—its performance is literally off the scale, which means there’s no existing infrastructure that would be able to measure the remarkable specs it delivers. So we designed HMC to measure itself, literally—the testing capability is built right into the chip. Now that we’re moving from the prototype stage toward actual production of this revolutionary product, the HMC Consortium (HMCC) is leading the effort to create in industry-adoptable standard and bring HMC to market.

More information: Read the press release about HMC’s “Best Technology of 2011” award. Learn more about HMC technology Find out about the HMC Consortium at hybridmemorycube.org

A Trillion Bits on a Fingertip

Tue, 06 Dec 2011 06:00:00 -0800

A terabit in a single NAND package—that’s what our latest NAND will deliver. I think a lot of people have a hard time understanding how these numbers relate to the real world, though. Our new 128Gb 20nm device can store a terabit of data in a single package of just 8 die, but what does that mean? To put it in perspective, a terabit (128GB) is a HUGE amount of data—according to Tech Target, it’s more than enough to store all the contents of an entire library floor of academic journals (100GB)—reams of information all packed within a single NAND package. But you’re probably not storing thousands of academic journals. For you and me it means more storage for downloaded movies, music, e-books, and photos. You probably don’t know how many NAND die are in your phone or SSD, but you do know how much it cost, which is what process improvements like these provide—more cost-effective, better storage solutions. Intel and Micron continue to lead the industry in moving innovative new NAND solutions to production.

Let me know what you think of our latest 20nm NAND by posting a comment below, or read more about our technology leadership on our Process Innovations page.

From the Embedded Systems Conference in Boston

Wed, 28 Sep 2011 15:58:00 -0700

Micron's Vice President of Embedded Solutions, Tom Eby, delivered his keynote address this morning, saying embedded memory is poised for exponential growth...and that Micron is poised to take advantage of that.

"It's estimated that 40 exabytes of unique new information will be generated worldwide this year," said Eby. "That's more than in the previous 5,000 years ... combined!"

Eby broke down trends affecting memory growth into three main categories...the three Cs: consume, connect and capture.

* Consume: Eby used examples of tablets, automotive infotainment, and televisions to illustrate how more and more data is being consumed.

* Connect: Eby characterized the internet of things as the next wave of connected devices ranging from household appliances to smart meters, all needing more memory. Eby also said that cloud computing will compliment, not compete with memory growth in devices and the data center.

* Capture: For this trend, Eby showed what he calls the "ultimate capture app," using the example of a gigapan image taken by David Bergman at President Obama's inauguration. It's comprised of 220 images and the final image size is 59,783 X 24,658 pixels or 1.47 gigapixels. See it here.

Glen Hawk Interview from FMS

Fri, 19 Aug 2011 10:48:00 -0700

I had a chance to sit down with Glen Hawk—our VP of NAND solutions—at this year’s Flash Memory Summit to talk about the conference and his keynote there. He had a lot to share about the growth of NAND, it’s place in a cloud-computing world, and where the technology is headed. His keynote also featured some great vignettes with several Micron customers who are using NAND in interesting new ways. If you weren’t one of the thousand who got to see the keynote in person, the video interview below should give you a good summary.

Is Bandwidth per Watt Important to You?

Fri, 17 Jun 2011 07:09:00 -0700

Today’s networking OEMs face the challenging task of designing for seemingly opposite goals—high performance in an energy-conscious “green” environment.

The EPA estimates* that in 2006 the nation’s servers and data centers used about 1.5% of the total U.S. electricity consumption—a whopping 61 billion kilowatt hours (kWh)—at a cost of $4.5 billion. In 2011 these figures could nearly double, reaching more than 100 billion kWh, at a staggering annual cost of $7.4 billion.

As one of the fastest-growing energy-use sectors in the nation, servers and data storage centers need a memory solution that can satisfy their rigorous performance demands while delivering the potential for significant improvements in energy efficiency. We put together these comparison charts to show how today’s leading memory technologies stack up in terms of bandwidth per watt:

*Source: http://www.energystar.gov

Micron's Power in Progress

Tue, 31 May 2011 02:37:00 -0700

Micron's products are in nearly every electronic device on the market today. We engineer the innovations that make computing faster, travel safer, healthcare more effective, energy greener and much more.

Watch our video to find out that where there's memory…there's Micron.

For Anyone Who’s Ever Tried to Compare SSDs…

Tue, 29 Mar 2011 09:00:00 -0700

Micron's Senior Applications Engineer, Doug Rollins, is participating in Storage Switzerland’s “How to Compare SSDs” webinar this Wednesday, March 30. Doug will talk about the importance of establishing "specsmanship"—or industry-standard terms and tests—for SSDs. Listen in as he debunks SSD myths, defines important SSD terms, and highlights standardized testing methodologies that work. Register today to attend the Webinar on Wednesday, March 30 at 11:00 a.m. EST.

Trends in Flash Memory–The Future is Clear

Wed, 01 Dec 2010 21:17:00 -0800

We recently sat down with Glen Hawk, our VP of NAND Solutions, to talk about the company’s direction and vision for NAND Flash memory. It’s a candid look at the challenges that NAND technology presents and our response in terms of developing NAND solutions that can go the distance and continue to provide advantages and create exciting possibilities well into the future.

NAND Demand is on the Rise, Bolstered by the Tablet Market

Fri, 01 Oct 2010 07:48:00 -0700

Analyst firm iSuppli recently issued a report forecasting a major surge in shipments of NAND flash memory, driven by the explosion in the tablet device market. Led by Apple’s introduction of the iPad™ earlier this year (and its immediate success with consumers), we’re now seeing a flood of competitive tablet offerings from OEMs spanning the industry--from the traditional PC manufacturers to smartphone OEMs and other mobile gadget makers. It’s impossible to predict which tablet versions will catch on with consumers and which ones will quietly fade out of circulation, but we do know that NAND flash will be in high demand for this product segment.

According to the iSuppli report, shipments of NAND for tablet devices are expected to reach 1.7 billion (yes billion!) GB in 2011, which is nearly a 300 percent increase over this year’s expected 428 million GB shipped. And this rising tide isn’t expected to pull back anytime soon—the report forecasts 8.8 billion GB in NAND shipments by 2014.

I had the chance to get some additional perspective on the report from Michael Yang at iSuppli, the analyst who wrote the report, and here’s what he had to say: “The NAND market is shifting from commodity-driven to embedded-driven, led by Smartphones and the rising interest in tablets. With at least 30 models anticipated before the end of the year, tablets’ rosy outlook is a boon for NAND flash memory. We expect average density of these tablets to grow from 28GB this year to 65GB in 2014.” From the Micron perspective, we’re excited about the end products making good use of the innovations we’ve made in NAND. With the rise in smartphone offerings, along with the increased adoption of SSDs in the enterprise, we’ve been working hard to ensure that we’re well positioned to meet the growing NAND demand. And now, with tablet computing coming on strong, the continued strides we’re making in NAND has an even greater impact in the end product designs. Increasing storage (NAND) capacity is one area we’ve focused on.

A key example of this is the milestone we reached this summer by adding three-bits-per cell of NAND storage on our 25-nanometer NAND process. This provides 8GBs of NAND storage on a single device – that’s smaller than your keyboard key - and opens up an even broader range of possibilities for flash memory design. We’re continuing to push the envelope and we’ll be talking about new memory breakthroughs in the months to come, so stay tuned. Whether it’s for today’s emerging tablet market or tomorrow’s “next big thing,” NAND flash will be an essential ingredient in the world’s most popular gadgets.

Excerpts from Micron’s Keynote at Flash Memory Summit

Tue, 07 Sep 2010 13:06:00 -0700

For those of you that didn’t attend the 2010 Flash Memory Summit, we grabbed a few excerpts from a keynote given by Ed Doller—Micron’s Vice President & Chief Memory System Architect—and created a highlight reel. Take a look at the video to learn some of the reasons why 2010-2020 is the decade of flash memory, and why, as Ed puts it, “It’s Gigabytes, not Gigahertz.” As always, drop us a line if you have any questions or comments.

Why SSD Testing Standards are Important

Tue, 24 Aug 2010 07:55:00 -0700

One of the great benefits of the Flash Memory Summit is the opportunity to interact with other people and companies that are serious about advancing Flash technology. One of those is Eden Kim, CEO of Calypso Systems—a company that builds SSD testers and is helping lead the push for standardized test methods (you might remember our recent post on their P300 performance testing results). On Wednesday, I interviewed Eden about what his company does, how their testers work, and why standards are so important. He also shared his thoughts on how our P300 SSD did against the competition.

Take a look:

The Scoop on 25nm TLC NAND

Tue, 17 Aug 2010 07:31:00 -0700

We put Kevin Kilbuck, our director of strategic NAND marketing, in front of a whiteboard so we could get some high-level perspective on today's Micron/Intel 25nm Triple Level Cell (TLC) NAND technology announcement. Is this brief video he reviews MLC, SLC, and TLC technology and demonstrates what a 25nm TLC NAND offers for consumer storage. Watch to learn more.

Is PCM the Next Big Memory Technology?

Tue, 10 Aug 2010 10:17:30 -0700

Future Memory: What Will Replace DRAM? That’s the title for the panel I was asked to sit on at last week’s MemCon 2010 event. It may seem premature to think about replacing DRAM now (we still see several generations of DRAM development ahead with a long-term home in computing systems), until you think about HW and SW design cycles. Hardware platforms for 2015, 2016, and even 2017 are being developed right now. So we need to pick the best option that’s working today and start thinking about how we’ll use it, especially if it’s not drop-in compatible. You can watch my arguments for why PCM will be that next-generation technology in this video. It was a great discussion, one that I’m happy to continue online—please post your comments and questions below.

What’s the future for PCM?

Wed, 04 Aug 2010 16:13:42 -0700

With the recent Numonyx acquisition, we’ve heard lots of questions about Micron’s commitment to phase change memory (PCM). Ed Doller, Vice President and Chief Memory Systems Architect, addressed some of these questions in a recent keynote at the MemCon conference in San Jose. His talk focused on PCM’s future as a viable, next-generation, nonvolatile memory and its position in the memory hierarchy. We’ll provide a video of his full presentation later this week on our blog. In the meantime, we wanted to share some in-depth insight on PCM and the reasons why Micron is supporting this technology. Greg Atwood, Micron senior fellow and resident PCM expert, has authored a paper on “The Evolution of Phase Change Memory,” which offers some interesting technical perspective on the product, its benefits, and future potential. For a high-level description of PCM history and features, download the white paper. You can also request PCM samples and read more about our current PCM product line at micron.com/pcm (PCM product details are listed under our “Navigate Numonyx” flyout as we work to integrate the two web sites). As always, feel free to comment if you have any questions.

New DDR2 Designs to Support Next-Gen Tablet PCs

Tue, 27 Jul 2010 14:57:00 -0700

The tablet market is booming as evidenced by a slew of recent market reports. ABI Research forecasted that 11 million tablets will be sold by the end of 2010. And according to the Consumer Electronics Association, the number of tablet shipments in the U.S. is expected to double in 2011. Those are some pretty remarkable statistics given that tablets (in their current form, anyway) weren’t really available twelve months ago.

The tremendous growth in the tablet space can be attributed, in part, to the popularity of the tablet’s balance between portability and performance (as measured by the ability to browse the Internet and access rich multi-media content and applications). That balance hinges on a handful of key features—long battery life, compact size, and solid performance—that really depend on the components inside.

Today we announced a new 50nm 2Gb DDR2 component that helps enable these popular tablet design features and functionality. Its small form factor, high-density, and low power demands make it an ideal memory choice for this market. In fact, we’re already working with Intel to support their new Atom platform—codenamed Oak Trail—which was specifically designed for tablet and netbook PCs. This combination provides a strong solution for our joint OEM customers to design next-generation tablets to keep pace with growing market demand. And because we’re manufacturing on our advanced 50nm process, customers can be comfortable that we’re in a great position to support this component for years to come.

2Gb components save space, and use up to 22% less power than 1Gb

RLDRAM 3 Memory; Building Tomorrow’s Network

Wed, 30 Jun 2010 08:21:00 -0700

Giga Om wrote an interesting article back in December on how much data America consumes. Based on UC San Diego’s research findings, it was reported that people in the U.S. accessed about 3.6 zettabytes of information in 2008 (that’s 3.6 billion trillion bytes). For some visual frame of reference, that’s about the same amount of information included in “thick paperback novels stacked seven feet high over the entire U.S.—including Alaska.” Staggering numbers, right? We’re gluttons for information—and the numbers only continue to grow year after year.

Of course, the UCSD study was counting all types of information consumption, not just what courses over our computer networks. But there’s no question that our consumption is shifting rapidly to traditional and cellular networks. We’re going to need significant advancements in network bandwidth and technology to keep pace with the impending explosion.

Micron’s newly announced third generation RLDRAM memory is a great example of this type of technology. RLDRAM 3 enables a faster, more efficient transfer of data over the network by doubling performance and cutting latency to sub 10 nanoseconds (that’s a fraction of DDR3’s latency). It may not be the sexy sort of technology that grabs lots of headlines, but it is an important key to helping networking OEMs meet tomorrow’s challenging infrastructure demands.

LPDDR2 and Mobile Market Trends

Tue, 20 Apr 2010 09:24:00 -0700

To offer some additional insight on today’s LPDDR2 announcement and trends in the mobile market, we sat down with Eric Spanneut, Micron’s director of mobile memory marketing.

Micron today announced a 2Gb monolithic LPDDR2 part, which would enable 8Gb packages for smart phones and tablet PCs. Are we really starting to see mobile applications that need this level of performance and DRAM density? How do they make use of it?

There are a lot of designs that need up to 4Gb LPDRAM this year, and we’re also seeing some designs in the tablet PC market that will need up to 8Gb, although the demand for this density is still pretty small. The fundamental drivers for higher density are multimedia applications and OS requirements. We also see a similar movement happening on the processor side with these vendors upgrading their chipsets and expressing a need for higher density LPDRAM, and NAND as well.

Why would they choose LPDDR2 over LPDDR1?

There are several reasons. First, it’s performance. LPDDR2 uses a faster interface and has better bandwidth. Second, LPDDR2 also has a better power profile with low voltage power supplies as well as enhancements to standby operations and Partial-Array Self Refresh modes, which provide further opportunities for additional power reduction. Third, LPDDR2 offers pin count reduction. Finally, the LPDDR2 standard allows for higher density components without an increase in pin-count.

Why is pin count reduction important?

On the processor side, you are pad-limited. You have the LPDRAM interface, NAND interface, USB interface, Bluetooth, etc. If the LPDRAM uses fewer pins, it lets the processor allocate these pins to other applications. Our LPDDR2 does this by multiplexing—the same pins can handle command and address.

Can you talk a little about why Micron’s LPDDR2 will be valuable to those in the ARM community? What sort of work is Micron doing with ARM?

ARM is the leader of core IP for the handset space, so naturally we work with them to do memory validation. This is an “upstream” effort where we show ARM what we’re intending to do with future memory. It’s good for ARM, because it allows them to develop their IP based on our memory recommendations and simulations. And it’s good for Micron as it provides us with some useful input on where the processor development is going and allows us to fine tune our portfolio to match that. Being validated with ARM also makes it much easier to validate our memory with the actual processors themselves. It’s not a 1:1 transfer of the work, but it does make the integration into customer products much easier.

Tablets have been getting a lot of attention lately. Would these products use LPDDR2 as well? Many netbooks use standard computing architectures—how do you see tablets shifting the mobile computing landscape?

We’re seeing that there will be entrants from two primary directions: shrunk-down Intel-based laptop platforms using mostly DDR2 or DDR3 and scaled up ARM-based handset platforms, which would mostly use LPDDR2. Choices of memories will be dictated by the price point targets, the feature requirements, and sensitivity to power consumption.

You mentioned in the LPDDR2 announcement that you were also developing versions of this technology for value-line handsets. When do you see this being adopted, and what will it mean to users?

Yes, we see LPDDR2 spreading from high-performance applications to gain share throughout the mobile space, crossing over with LPDDR1 at some time in 2012. The reason we think this will get traction is because LPDDR2 can be combined with a new generation of NOR and use a single bus. This means, again, a pin count reduction. In the low end, handset designers are really fighting for pennies of margin wherever they can. A pin count reduction allows the processor to be shrunk, which reduces the cost. These products would be offered in a LPDDR2/NOR multi-chip package, which will enable a more cost-effective system solution.

P300 SSD Preview from SNW 2010

Thu, 15 Apr 2010 11:15:00 -0700

I attended Storage Networking World this week in Orlando, Florida where I had the chance to talk with Kevin Dibelius of Micron’s SSD group and learn more about their enterprise SSD initiatives. Take a look at the video for your “sneak peek” at the RealSSD P300.

Making Memories

Wed, 10 Mar 2010 11:20:00 -0800

Recently, I traveled to Lehi, Utah with a select group of media and industry analysts for a tour of IM Flash Technologies, the fabrication facility where we make our NAND flash memory. Together with some colleagues from Intel, we enjoyed a rare opportunity to see the inner workings of this state-of-the-art fab.

This was the first time Micron has ever allowed media and analysts inside the fab – an experience that many reported was well worth it. Just ask Allyn Malventano from PC Perspectives: “Getting a first-hand look at the bleeding edge of chip fabrication is something I know I’ll be talking about for years to come.”

To be honest, this was also my first time inside the fab. Sure, as a PR professional, I can wax poetic about the products we make, but understanding the behind-the-scenes process that goes into manufacturing the technology is a different story. I learned that the tiny memory devices in my smartphone—storing hours of tunes from Jay-Z to Lady Antebellum, countless family pictures and videos, and voice recordings from media interviews—are not easy to make.

Here I am striking a pose. How else would you hold a wafer?

Maybe you’ve already seen some of the slideshows compiled by the media who were given exclusive access inside the fab, but that only paints part of the picture. Don’t worry, I’m not going to geek-out on you and talk about how cutting-edge the process is (even though it is…). Instead, I’m going to tell you about my experience and the sights and sounds that left an impression.

Au Naturel Before entering the fab, I was given strict instructions to come “au naturel.” I had to be rinsed of all potential wafer toxins— no make-up, no hair product, no deodorant. I’m fine without the make-up or hair product, but I laughed to myself about going deodorant free. I’m fairly certain the lack of deodorant after a 12-hour shift in a bunny suit could become quite toxic.

Group shot. Don’t we look like a fun bunch?

The tour began in the gowning room, where we hopped—pun intended—into bunny suits. Bunny suits are special full-body coveralls that prevent any contaminants (e.g., sneezes, lint, hairs, etc.) from being shed into the clean room environment and could potentially damage the wafers. Only our eyes were exposed. It was kind of mysterious. I was surrounded by some of the smartest people in the world, working on the most advanced semiconductor processes, yet I couldn’t tell who anyone was.

Zooming Robots As we entered the fab, I saw—and heard—tracks with “zooming robots” overhead continuously transporting wafers throughout the plant in a Jetson-esque fashion. The robots, known as the AMHS (Automated Material Handling System), traverse through approximately four miles of track throughout the fab, tirelessly moving pods of wafers to their next phase in the manufacturing process. The whole process was remarkable.

Inside the photolithography area where they use the yellow “tanning” lights.

Yellow Lights Did you know that the yellow lights inside the photolithography rooms are no longer necessary? Originally, when the manufacturing process was more manual, the lighting was controlled to prevent any possible adverse effects exposure to bright lights could have on the wafers. And now, because much of the process is done inside the large machinery and the wafers no longer appear out in the open, the yellow lights aren’t really necessary. But, IMFT continues to use them out of tradition. Personally, I like the yellow lights. If I can’t wear make-up in the fab, at least the yellow lights add a golden “touched by the sun” hue to the small part of my face that people could see.

The 50-yard line, and the zooming robots (AKA automated material handling system) overhead.

Massive Scale The sheer size of the fab was amazing, filled with gleaming tools and machinery. One could easily get lost inside this facility and I was thankful I had a guide. Just for reference, the building is roughly the size of three football fields. In fact, keeping up with the football analogies, inside the fab there is a corridor that they dubbed the 50-yard line, separating the fab into two equal spaces.

Talking to my colleagues afterwards we all agreed that this kind of peek inside a world-class fab was an amazing experience. I have a new appreciation for the people and the process that goes into making these little memory devices that I get to write and talk about everyday. Maybe some of you have your own experiences and memories inside the fab? If so, don’t be shy, post a comment and let us know what it was like for you.

Why Copper is Critical to the Best DRAM Technology

Tue, 09 Feb 2010 15:40:00 -0800

Yesterday we announced our 42nm DRAM technology with a 2Gb DDR3 device. If you just skimmed the headlines, you could have missed an important point—our DRAM is built with copper for critical metallization layers (not aluminum, like some others are). Now, that might be something you’re tempted to shrug off, “Isn’t DRAM just built to standardized specs? Does the metallization type really matter?” It absolutely does as we move below 50nm process technology and DRAM product specifications become more demanding and complex.

We invested in Cu process technology for our leading DRAM fabs nearly a decade ago because we saw that it offered consistently high product quality and excellent long-term reliability. In addition to the quality and reliability benefits, the use of Cu processing is also effective at reducing the overall process cost. Running critical metal levels with Cu is beneficial both in terms of lower initial capital cost, as well as a providing a significantly more cost-effective manufacturing process once it’s up and running. We believe our proprietary copper process translates into several distinct advantages:

Product Quality
The use of Al metallization for critical levels on DRAM for process nodes below 50nm can be done, but it comes at the price of significant quality and performance sub-optimization. We believe that pushing Al so close to its limit compromises the overall quality of the die. Using copper allows us to achieve an efficient and reliable process for consistently creating high-quality die.

Reliability
Even more important from a customer perspective, though, is product reliability. We’re confident that our Cu process methodology will deliver consistently high reliability over time. We believe that many of the side effects of pushing Al into the 4Xnm space may begin to show themselves a year or two down the road in the form of higher-than-average failure rates.

Performance
Ultimately, we expect our 42nm copper process—coupled with proprietary cell capacitor technology—will be the foundation for excellent reliability and high performance in our products. We believe that this will put us in an ideal position to continue designing high-performance DRAM for demanding applications like servers. If we were using Al at this point, it might limit our ability to sell into those markets at all.

A Clear Path Forward
We can leverage our copper process technology to reach even smaller DRAM nodes. We’ve already got 3Xnm DRAM working in our R&D fab in Boise, Idaho and look forward to smoothly stepping through to future generations.

As you can tell, we’re confident in the strength of our technology and designs. We’re eager to get this next-generation DRAM out into the market; sampling is scheduled to start in the second quarter of 2010 with production ramp planned for the second half of the year.

Just How Small is 25nm?

Mon, 01 Feb 2010 09:02:00 -0800

Technology moves fast. It was only 14 months ago that we went into production with our world-leading 34nm process NAND, and we’ve already moved on to 25nm NAND. In this brief whiteboard video, I explain just how small 25nm is (3,000 times smaller than the diameter of a human hair) and why our ongoing quest to shrink process technology is vital to the future of storage.

World’s Most Advanced Semi Process

Mon, 01 Feb 2010 07:58:00 -0800

Today, Micron and Intel announced 25nm NAND, the smallest, most advanced semiconductor process technology in the world. This achievement allows us to double the capacity of our highest-density MLC device, enabling up to 64GB in a single package and paving the way for big developments in storage, computing, and consumer electronics.

The video below features highlights from a presentation given by Intel and Micron executives at our 25nm announcement. Learn what our aggressive scaling strategy means for the future of storage and the next generations of NAND.

Top 10 Product Innovations of 2009

Thu, 31 Dec 2009 15:20:00 -0800

Let’s commemorate the close of the year with … a list! OK, to be honest, ending the year with a Top 10 List is not very, um, well, innovative. But it’s what’s on our list that’s innovative. And the year 2009 for Micron and Lexar Media can be summarized like this: Bigger. Faster. Better. So, that’s our Top 10 list for 2009, innovatively reduced to three memorable points. Still not ready to let go of tradition? Then, on with the Micron and Lexar Top 10 Innovations of 2009 countdown:

1. Maximizing Capacity – Crucial 4GB DDR3-1333MHz Memory Module Yes, bigger is better. Memory hogs of the world rejoiced when Crucial announced its 4GB DDR3-1333MHz (PC3-10600) non-ECC UDIMM memory module. It allows power users to max out their systems with up to 24GB of computer memory.

2. Color Me Fast – Crucial Ballistix Tracer 2GB DDR3-1600 Not only do the Crucial Ballistix Tracer 2GB DDR3-1600 memory modules use Intel Extreme Memory Profiles (XMP) for easy overclocking, they also come with stylish red, blue or green heat spreaders and matching LEDs. Now, if only your socks matched.

3. 600X and Be There – Lexar’s 600x Professional CompactFlash cards With an industry leading 600X (90MB/s) guaranteed minimum sustained write speed and the reliability of Image Rescue software, Lexar remains the professionals’ preferred high-performance memory card.

4. Socially Aware – Lexar High-Speed microSDHC Card The introduction of Lexar's High-Speed microSDHC Card kit brought an easier, faster way for mobile-device users to upload photos, videos, music and files from their handhelds to their host computers and share them with friends through social media channels. Named the “Shining Star” in the MobileVillage Mobile Star Award program in the portable storage hardware category, the card and accompanying side-load software ushered in a new market where data can be shared easier than ever before.

5. Is it safe? – Lexar JumpDrive SAFE S3000/SAFE S300 FIPS More than ever, security standards were a priority for enterprise organizations and government agencies in 2009 and the Lexar JumpDrive SAFE S3000 and JumpDrive SAFE S3000 FIPS were the first to incorporate smart card-based encryption technology to deliver secure, manageable portability to organizations that must meet strict security regulations.

6. Big Performance, Small Size – Micron 34nm NAND and Lexar memory cards In June, Lexar announced the inclusion of Micron’s 34nm NAND flash memory across a number of product lines. By including the award-winning 34nm NAND technology in its memory cards and flash drives Lexar is able to offer industry-leading products with high performance at a more cost effective price point—a differentiator the company continues to focus on as it heads into 2010.

7. Serious Endurance – Enterprise NAND Micron’s MLC Enterprise NAND provides a viable alternative to standard SLC NAND that allows enterprise applications the ability to cost-effectively and reliably double storage capacity (since MLC provides twice the storage space in the same die size as SLC). The new MLC Enterprise NAND chip is able to reach 30,000 write cycles (6x the reliability of standard MLC NAND).

8. The incredible shrinking chip – 3 bit-per-cell Micron and Intel teamed up through their joint venture, IM Flash Technologies (IMFT), to roll out the industry’s smallest and most cost effective 32Gb 3 bit-per-cell (bpc) NAND chip for flash cards and USB devices. Made on its leading 34nm process technology, the 3bpc product demonstrates the companies’ continued progress in NAND development. Stay tuned for more on Micron and Intel’s next NAND milestone—a new 2Xnm NAND process will be announced in early 2010.

9. Seeing Pico-Projection in a Whole New Light – FLCOS Microdisplays In 2009 we saw pico projection begin to make significant headway in the consumer electronics space. Micron also got active in this space in 2009, acquiring innovative FLCOS microdisplay technology. Our high-speed FLCOS microdisplays create vibrant, sharp images from a tiny, low-power chip, so they’re perfect for mobile devices. If you want to see FLCOS technology in action, check out the 3M MPro120—one of the year’s best pico-projector offerings.

10. RealSSD C300 – The Industry’s Fastest SSD The year culminated with Micron unveiling its C300 RealSSD Solid State Drive. This is no ordinary SSD, the C300 took the title of the fastest notebook and desktop SSD in the industry. And don’t just take our word for it, these benchmark videos show the drive in action. In addition, it’s the first SSD to use a SATA 6Gb/s interface, which provides twice the bandwidth of the standard SATA 3Gb/s interface.

Ready for Windows 7? Don’t Forget the Memory.

Thu, 22 Oct 2009 08:36:00 -0700

I had a chance to sit down with Micron’s Matthias Buchner, director of segment marketing for Micron’s DRAM product group, to talk about the launch of Windows 7, the memory impact and other trends in the industry.

Chris Smith: Thanks Matthias for talking with me. I was hoping you could give us some perspective on how the launch of Windows 7 today will impact DRAM demand?

Matthias Buchner: Sure, happy to talk with you. It’s important that we first look at it from the OS perspective, and then I’ll touch on the DRAM impact. In general, consumers have been waiting for a reason to purchase an upgraded PC for years. Whereas Windows Vista was an evolutionary step, industry insiders believe that Windows 7 is the revolutionary catalyst that will bring would-be PC buyers off of the sidelines and into the PC market. While I expect that Windows 7 memory content will increase to 4GB from 2GB, I also believe that the launch of Windows 7 will spur DRAM bit growth through increased PC unit sales. Unit growth should be driven by consumers in calendar 2010, followed by the enterprise applications in calendar 2011.

Chris: Do you expect a bigger bounce in memory with the Windows 7 roll-out, compared to Vista?

Matthias: I think it’s important not to compare Vista and Windows 7 because there have not been so many upgrades to Vista. We need to look at it from a perspective of comparing Windows 7 to Windows XP. The expectation now with Windows 7 is that there will be a strong adoption rate, because there hasn’t been anything really new on the PC side for a couple of years, therefore we see a bigger bounce in memory.

Chris: What do you see as the sweet spot for DRAM density in Windows 7-based notebooks? What about netbooks?

Matthias: We see 4GB as the sweet-spot in notebooks with the 2Gb-based DDR3 components spurring this transition, enabling a more cost-efficient way to achieve this density. On the netbook side, most of the systems today are 1GB, I see the density moving to 2GB since with Windows 7 the memory can be expanded. The end-user push will come because netbooks are really used as a secondary notebook, for example, when traveling. Once the consumer is used to the performance of a home computer or notebook, they won’t want to veer too far away from that in terms of performance, so as I mentioned, we see 2GB as the density sweet spot there. Also, it’s important to point out that for desktops, we see the same transition paths as with notebooks.

Chris: What benefit do denser memory modules provide to these systems?

Matthias: The benefit of denser memory modules will arise as a greater number of applications and drivers for the 64-bit architecture begin hitting the market. Until now, the majority of the software applications written for Windows have been optimized for 32-bit architecture despite the OS and hardware being 64-bit-capable for quite some time. Unlocking the true potential of 64-bit optimized software applications will require additional DRAM, especially if multiple 64-bit applications are being used simultaneously.

Chris: Looking bigger picture, what trends do you see happening in DRAM heading into 2010?

Matthias: 2010 is shaping up to be a big year for DRAM technology transitions. The major trend we see is the conversion from DDR2 to DDR3, as well as the density transition in DDR3 from 1Gb-based modules to 2Gb-based modules. The transition to DDR3 has already started on the server side, but we definitely will see a much stronger conversion to DDR3 in computing next year. We also see a trend in reducing power consumption, or lowering voltage in the systems. In moving to DDR3 we are getting down to 1.5-volt, and we see going to 1.35-volt as important. Micron was one of the first companies offering 1.35-volt on DDR3.

Additionally, we see a trend around improved performance. When DDR3 first was introduced it was running at 1066 Mb/s and now we’re at 1333 Mb/s. Next year, in the high-end systems, we’ll be at 1600 Mb/s for DDR3. And as I mentioned earlier, from the module side, with 2Gb DDR3 gaining traction, we see 4GB memory modules being the sweet spot for density with Windows 7, which provides for a more cost-efficient solution.

Chris: What about graphics memory?

Matthias: We see an opportunity for mainstream memory components to serve a majority of the graphics market. We plan to tailor our mainstream DDR3, optimizing memory performance and driving it to achieve the speeds needed for the graphics side. With Windows 7, we also will see desktop systems with a standalone graphics card, which will benefit from the higher performance and density that new DDR3 components will deliver.

Chris: More than ever, consumers seem interested in making their purchases last; for both environmental and economic reasons. Why should consumers be more comfortable about spending money now on a system with Windows 7 and 4GB RAM?

Matthias: To start, Windows 7 is a superior operating system versus Vista. So those that have been wary about purchasing a new computer, or just happy with what they have, should actually see the immediate benefits with Windows 7. Also, though, the normal PC replacement cycle has been burdened by the economic downturn. When comparing a system purchased by a consumer two, three or four years ago, most entry level systems today will have at least 2x the computing power. So the consumer not only gets the new OS, but a system with enough computing power to meet their needs for a while. And with a 4GB system today, consumers should feel comfortable being able to easily upgrade their system to a virtually unlimited amount of DRAM for their system. Users can simply purchase additional DRAM as the technological landscape evolves and more and more memory-hungry applications are introduced over time.

Chris: Do you think there is a pent-up demand that could manifest itself with a Windows 7 system within businesses?

Matthias: We should see a big push in Windows 7 adoption for both notebooks and for desktops - either for new systems or upgrades - in the business environment. One of the great advantages of Windows 7 is that it provides a solution not only for the consumer, but also businesses.

Chris: Thanks again for your time and for your perspective on Windows 7, and what we should expect on the memory side.

Matthias: You are welcome

Overprovisioning: Give a little, get a lot.

Fri, 10 Apr 2009 15:11:00 -0700

Suppose I told you that the local car dealership was selling a car that offered double the gas mileage of standard models (or double the top speed for you daredevils). You'd probably say something like "Sure, but what is it going to cost me?" Suppose I told you that the models were identical, but the performance version had just one less seat. In order to double the gas mileage or top speed, all you had to do was give up a single seat. Would you buy it? If you used you car as a vanpool, and if you were loaded to the gills already, probably not. But what if I also told you that this rule applied to their larger vehicles too—you could get a massive 18-passenger maxi-van with double the typical gas mileage if you were willing to order one with 13 seats instead. Suppose I also told you that this trick worked on every car they made. What about now? Would you do it? For those of you that think I've lost it there is a computer analogy coming (you knew there would be, right?). Suppose I told you that you could as much as double the performance of your solid state drive (SSD) if you gave up 25% of the capacity. Would you do it? Suppose I also told you that the drive will last longer as a bonus. How about now? You can do all this. How? Overprovisioning. First, a little background on overprovisioning—the basic principle here is to put more NAND on the drive that the drive actually reports. Why on earth would one do that? Performance. Suppose we have a drive that actually is built with 64GB of NAND. Suppose we "fix" the drive such that it knows to tell the operating system (Windows, Linux, doesn't matter) that it is "really" a 50GB drive and that the drive owns the extra 14GB of NAND. So physically we have 64GB on the drive, but logically the drive only shows it has 50GB. Where did the other 14GB go? Who stole my NAND? Well, nobody--the NAND is still there. That extra 14GB is reserved for the drive; it is there only for the drive's private use. This is the principle of overprovisioning. What does the drive use the extra space for? Several background bookkeeping functions that are hidden from the user, but that are essential to a solid state drive's performance over the life of the drive. In a nutshell, NAND-based SSDs like to group data together--it's a feature of NAND's personality, the chips like to have data grouped. They also like to leave little pieces of data scattered about the drive. A contradiction? Yes, NAND is like that. The contradiction comes from the physical way NAND is erased and programmed. The short version: when NAND is erased, it has to be erased in large segments. But applications and operating systems like to write data in small blocks. So even though the NAND prefers the data in large chunks, applications and operating systems aren't always so obliging. Therefore we get scattered bits of data on the drive. But, NAND drives are smart. They know that they like their data well organized and rely on the NAND controller to group these little scattered bits and place them all nice and neat together. We use a somewhat unflattering term for this process: garbage collection. Another important feature of NAND-based SSDs is "wear leveling" - which ensures that all the NAND cells on the drive work together to share the storage load (wouldn't it be nice if people worked that way?). In order to ensure all the cells share the work, the NAND controller often has to move data around--moving data from cells that are heavily used to less-used cells to make sure all cells are worn evenly. Hence the fancy name. In order for garbage collection and wear leveling to work, they both need free space on the drive. This free space is a temporary spot to put data during the garbage collection and wear-leveling processes. The data sits there for a bit until it finds a more permanent home. On an empty drive, free space is abundant, but what about a full drive? What happens to free space--the working space the garbage collection and wear leveling processes use--as the drive fills? It goes away. Without free space, these processes struggle to keep up with demand. What's a drive to do? It needs to collect the garbage (by the way, I don't like that term, but it is well adopted) and do its wear-leveling thing. Enter overprovisioning. By reserving a bit of NAND (typically 25% in an enterprise drive and 7% in a client drive) for these background processes--effectively hiding that "extra" space for the OS--the NAND controller is ensured that it has enough empty space to do its thing and not get in the way of the normal data storage processes. Cool, isn't it? But what's the real gain? I mean, you're essentially giving up 25% of the drive to this reserved space--so what do you really get? First let me throw out a caveat: YMMV (Your Mileage May Vary). Because the actual improvement is heavily dependent on workload, the OS, how full the drive really is, and a number of other factors. However--in the lab I've seen performance improvements up to 4X, and--the drive lasts longer too. For us, overprovisioning was a no-brainer. With the rapid and regular increases in NAND density, giving up a small slice of capacity for better performance, higher reliability, and longer life was an easy call. I'll discuss all the details more in a later post.

Winning Innovations! Micron NAND and DRAM Technology Recognized by Semiconductor Insights

Thu, 02 Apr 2009 03:20:00 -0700

Congratulations are in order for Micron. The company was recognized by Semiconductor Insights for their industry-leading innovations in DRAM and NAND technology. As part of its annual Insight Awards program, Micron’s 50nm DRAM was presented top honors in the category of Most Innovative DRAM and its 34nm NAND won the award for Most Innovative Process Technology. Learn more about these award-winning technologies from Micron by viewing the press release.

Analysis: The Race to 50nm DRAM Puts Micron on Top of the Competition

Mon, 23 Mar 2009 03:51:00 -0700

EE Times published a review today by Semiconductor Insights (SI), comparing Micron’s 50nm DRAM to similar 50nm-class products from the competition. Elegance and efficiency were two words the SI analyst used to describe Micron’s 50nm DRAM. When comparing it to similar products from competitors the analyst notes that Micron’s process delivers the “…smallest cell size ever seen in a DRAM device.” Check out the full article here, and read how Micron has “struck the right balance between investment in new technologies and conservative design decisions.”

Beyond MLC NAND: Some Perspective

Tue, 17 Feb 2009 06:52:48 -0800

There has been quite a buzz in the industry lately about NAND flash products that are capable of storing more than two bits per cell, so I wanted to just take a minute and provide our perspective. Simply put--what ultimately matters is having the lowest cost-per-bit solution in volume production at a given moment in time, not how many bits per cell are stored. Now, that said, there’s no question that being able to store more bits per cell results in lower cost. However, there are some serious trade-offs that we think make this option not viable at this time. Most notably--performance and reliability suffer. In fact, we estimate that the performance (measured in write-cycle throughput) for going from two to three bits per cell using the same NAND architecture and process technology could be as much as halved. And reliability, (measured in write-cycle endurance) could be up to an order of magnitude worse (yes—up to 10x worse). Scary stuff. Because having a product that may have a lower bit cost, but doesn’t meet today’s level of performance and reliability limits the value of that product. It’s also worth noting the greater burden on the system implementation of going beyond today’s well-understood MLC technology, such as making sure the controller provides adequate ECC coverage. Perhaps the most critical factor is the time frame of when the new product is introduced relative to the next-generation process technology. So, for example--most NAND manufactures introduce MLC products first on their latest-and-greatest process node, and then introduce other products as the process matures. But, if you introduce a new product with more than two bits per cell and your next-generation process technology is production-ready shortly thereafter, it is likely that your new product will not be successful, since the next generation process will provide lower cost, higher performance, and higher reliability with the good-old standard MLC. Now, all that said, at our core we are innovators--and I’ll tell you that we are currently developing products that go beyond two bits per cell. But we also feel that the technology as a whole hasn’t come into its own just yet. It will, but what’s clear now is that lithographic scaling is the key to achieving the lowest costs while delivering the performance and reliability that the industry needs.

History of Digital Storage. Part 7: NAND in SSDs

Mon, 16 Feb 2009 07:13:00 -0800

The Marriage of NAND Flash and SSDs

A History of Digital Storage
1. Tape Drives
2. Magnetic Drum Memory
3. The Birth of the Hard Drive
4. The 5.25-inch Hard Drive
5. Limitations of the HDD
6. The RAM SSD & NAND
7. NAND in SSDs

NAND technology paved the way for a new breed of SSD that is able to emulate HDDs in most enterprise or consumer applications. These SSDs are far less expensive than DRAM-based SSDs and still offer several advantages over HDDs—particularly in terms of performance and reliability. Because NAND-based SSDs are a solid state technology, they have no moving parts and offer much better performance than HDDs. When a command is issued to an HDD, the drive must seek with its actuator, spin its platter, and then transfer the data back to the host. But SSDs have no moving parts (requiring only the time it takes to process the command), and they have random access times as quick as 20µs [52]. The improved performance of new SSDs equates to 10,000 IOPS compared to less than 450 IOPS for the fastest HDDs [53]. When used in enterprise applications like Internet banking, SSDs might significantly boost information access. With no moving parts to wear out or break, an SSD will outlast almost any HDD, which typically has only a three- to five-year life expectancy if it is not bumped, banged, or dropped. By comparison, a modern SSD might last twice that long and do so without the sensitivities to mechanical shock and while consuming only a fraction of the power. RAIDs, Connections, and the Next Step for SSDs SSDs can go anywhere an HDD can, so for enterprise and consumer applications alike, SSDs are replacing HDDs—a trend that is sure to continue for the next decade or more. But using an SSD as a drop-in replacement for an HDD is not necessarily using SSDs to their fullest potential. RAID controllers, HDD interfaces, and storage subsystems have been optimized for the characteristics of rotating magnetic media and may be a bottleneck for solid state storage. Due to the flexibility of NAND solid state storage, SSDs will once again change the picture of storage in computers. NAND-based storage will become more integrated into the computer and will enable new generations of applications. Productivity gains will be measurable and the power savings, dramatic. Conclusion Digital storage has come a long way since 1956, with the most recent innovation being SSDs. And now that SSDs are gaining new ground with the advancements made possible by NAND Flash technology, they represent the next evolutionary step for storage applications. Notes: [52] Wong, page 15. [53] Justin Sykes, "SSDs to Boost Data Center Performance," Micron Technology, Inc. Boise, Idaho, (July 30, 2008): page 3.

History of Digital Storage. Part 5: Limitations of the HDD

Mon, 02 Feb 2009 07:10:02 -0800

An HDD's Mechanical Limitations

A History of Digital Storage
1. Tape Drives
2. Magnetic Drum Memory
3. The Birth of the Hard Drive
4. The 5.25-inch Hard Drive
5. Limitations of the HDD
6. The RAM SSD & NAND
7. NAND in SSDs

In spite of new technologies like perpendicularly aligned bits and HAMR, HDDs are mechanical devices at heart and, as such, they face many performance challenges. Indications are that, ultimately, as storage systems continue to evolve, HDDs will be replaced. Mechanical devices cannot improve as quickly as solid state technologies can. For example, "over the past 20 years, microprocessor technology—which plays a key role in data storage efficiency and function—has enabled CPU performance to nearly double every 18 months. Put another way, CPU performance has increased 16,800 times between 1988 and 2008, but HDD performance has increased by just 11 times." [37] Even leading HDD manufacturers recognize the [caption id="attachment_423" align="alignright" width="300" caption="Relative Performance Improvement for CPUs and HDDs"][/caption] HDD performance problem. When Seagate Technology introduced faster, 15,000-RPM disk drives in 2004, it released a white paper describing the need for better HDD performance. "Dramatic advances in processor speed, RAM size and RAM speed have combined to accelerate system performance to levels unthinkable just a few years ago. Such powerful hardware resources have made feasible software solutions with increasingly sophisticated and comprehensive capabilities, enabling business productivity to climb at a remarkable rate. Yet one aspect of system evolution has historically lagged behind: disc drive performance. While impressive advances in density have yielded exponential growth in disc drive capacity, disc drive speed has achieved only modest gains over the years," [38] Seagate said. [caption id="attachment_424" align="aligncenter" width="300" caption="HDD Performance hasn't kept pace vs Other System Components [3"][/caption]To try to close the HDD performance gap, manufacturers have increased the drive’s rotational speed, added more advanced heads, and used techniques like short stroking, which restricts data to 5%–30% of the platter to boost performance. Western Digital, for example, recently released a speedy 20,000 RPM HDD. But faster and faster disk rotation cannot be a lasting answer because these high-speed HDDs potentially make more noise, devour more power, and become increasingly less reliable. In addition, these higher-performance HDDs all sacrifice capacity. Each time the CPU issues a command "the hard drive’s mechanical system must then seek the requested data block or file by rotating its spinning platter and reaching out with its actuator." [39]To be sure, HDD engineers have continued to improve these devices and thus, stave off their ultimate extinction. HDD Mean Time Between Failures (MTBT) "It is estimated that over 90% of all new information produced in the world is being stored on magnetic media, most of it on hard disk drives. Despite their importance, there is relatively little published work on the failure patterns of disk drives and the key factors that affect their lifetime. Most available data are either based on extrapolation from accelerated aging experiments or from relatively modest-sized field studies. Moreover, larger population studies rarely have the infrastructure in place to collect health signals from components in operation, which is critical information for detailed failure analysis." [40] This seeming lack of information about a modern HDD's mean time between failures is a problem for large data centers and for the potential survival of HDDs. To try and shed light on the subject, Google created the first, large population HDD failure study in 2006 and released their findings at the 5th USENIX Conference on File and Storage Technologies in February 2007. The Google research categorized dozens of failure types, found a handful of unexplained relationships, and generally showed that HDDs fail more often than manufacturers predict [41]. The study was an important first step since it provided users with foundational data for further research and it gave HDD manufacturers a sort of failure map. Solving some of these issues may result in better HDDs in the near future. If they go unaddressed, however, these failure issues could spell the end of HDDs.

Notes: [37] Justin Sykes, "Performance Productivity for Enterprise Applications," Micron Technology, Inc., Boise, Idaho, (July 30, 2008): page 1, downloaded from http://download.micron.com/pdf/whitepapers/performance_productivity_for_ent_apps.pdf. [38] “Economies of Capacity and Speed: Choosing the most cost-effective disk drive size and RPM to meet IT requirements,” Seagate Technology LLC, Scotts Valley, CA, (May 2004): page 2, downloaded from http://www.seagate.com/docs/pdf/whitepaper/economies_capacity_spd_tp.pdf [39] Sykes, "Performance Productivity for Enterprise Applications," page 2. [40] Eduardo Pinheiro, Wolf-Dietrich Weber, and Luiz Andre Barroso, "Failure Trends in a Large Disk Drive Population," Google Inc., Mountain View, Calif. (February 2007): page 1. [41] Pinheriro et al, page 12.

Choosing the Right NAND

Thu, 29 Jan 2009 07:28:39 -0800

[caption id="attachment_244" align="alignright" width="192" caption="A 2Gb NAND Flash memory device organized as 2048 blocks"][/caption] We just published a new white paper that offers an overview of some of the various technologies of NAND across the burgeoning market--from basic MLC and SLC to High-Endurance and Serial NAND. Because each of these flavors offer significantly different performance capabilities, features, and benefits, my hope is that it can be worthwhile starting place in helping designers make informed decisions about their memory choices, and get the best out of their designs. Learn more

History of Digital Storage. Part 4: The 5.25-inch HDD

Mon, 26 Jan 2009 07:06:36 -0800

A History of Digital Storage
1. Tape Drives
2. Magnetic Drum Memory
3. The Birth of the Hard Drive
4. The 5.25-inch Hard Drive
5. Limitations of the HDD
6. The RAM SSD & NAND
7. NAND in SSDs

In 1980, Seagate Technology introduced the world's first 5.25-inch hard drive, bringing HDDs to a broader audience; prior to 1980 only large and well funded companies could afford the technology. HDD capacity grew as much as 30% each year in the 1980s before accelerating to more than 60% per year in the 1990s. By 1999, HDD capacity was doubling every nine months [26] The SPE Barrier–HDD Innovation To achieve the HDD's nearly exponential density growth, scientists and engineers miniaturized the magnetic grains or bits on the platter's surface, squeezing more bits into the same or even smaller physical space [27]. These same researchers also developed more sensitive read/write heads (the giant-magnetoresistive head introduced in 1997, for example), capable of detecting faint magnetic fields [28]. Since its inception, HDDs have faced a density-growth challenge in the form of the superparamagnetic effect (SPE). "Superparamagnetism occurs when the microscopic magnetic grains on the disk become so tiny that random thermal vibrations at room temperature cause them to lose their ability to hold their magnetic orientations. What results are 'flipped bits' – bits whose magnetic north and south poles suddenly and spontaneously reverse – that corrupt data, rendering it and the storage device unreliable." [29] Temperature plays a role in the SPE since another way to describe the effect is to say that when the ambient thermal energy equals the amount of energy needed to change a bit's polarity, that bit can flip and lose the data it was storing. As bits are compressed, they become more susceptible to SPE, meaning that larger and faster HDDs have the potential to become less reliable [30]. For several decades, HDD developers have searched for ways to stave off the eventuality of reaching the density and reliability limits of HDDs. One of the chief ideas proffered was to align bits perpendicularly rather than longitudinally. Famed inventor Valdemar Poulsen, who is sometimes called the Danish Edison, was one of the first researchers to experiment with perpendicular recording nearly 100 years ago [31], but it took modern engineers at leading HDD makers to actually produce HDDs with perpendicular bits like Hitachi Global Storage Solutions first introduced in 2006. In longitudinal magnetic recording, each bit is oriented horizontally on the platter, whereas perpendicular recording orients bits vertically on the platter and actually increases the number of bits that can be aligned on the disk [32]. Perpendicular recording is also inherently more stable across temperature ranges [33] because its poles are arranged south pole to south pole and north pole to north pole. In this way, bits naturally repel each other, reducing the likelihood of the SPE occurring [34] Several of the world's leading HDD makers now offer perpendicularly aligned HDDs. [caption id="attachment_422" align="alignright" width="300" caption="Perpendicular Recording"][/caption] Heat-Assisted Magnetic Recording Heat-assisted magnetic recording (HAMR) is a hybrid of magnetic and optical technology that represents the latest innovation in HDD development. HAMR has the potential to increase HDD density by an order of magnitude while still avoiding the SPE 's limitations [35]. With HAMR, engineers use a laser to briefly heat an area of an HDD's platter. The heat lowers that area's coercivity so it is below the coercivity of the magnetic field that the recording head is producing, essentially making it easier to flip a given bit's magnetic orientation in a stable magnetic material and allowing for "smaller thermally stable grains." [36]

Notes: [26] Zeytinci, page 7. [27] Kim Nguyen, "Perpendicular Recording: A Boon for Consumer Electronics," Hitachi Global Storage Technologies, San Jose, Calif. (April 2005): Page 1. [28] Zeytinci, page 10. [29] Nguyen, page 1. [30] "Hard Disk Superparamagnetics," Dataclinic: downloaded from http://www.dataclinic.co.uk/hard-disk-superparamagnetic-effect.htm on October 12, 2008. [31] Nguyen, page 3. [32] Nguyen, page 3. [33] Yochiro Tanaka, "Fundamental Features of Perpendicular Magnetic Recording and the Design Consideration for Future Portable HDD Integration," IEEE (January 2005). [34] John Best, "Perpendicular Recording: Opening the Boors for 10-fold Hard Drive Capacity Expansion," Computer Technology Review (June 1, 2005). [35] Mark H. Kryder, Edward C. Gage, Terry W. McDaniel, William A. Challener, Robert E. Rottmayer, Ganping Ju, Yiao-Tee Hsia, and M. Faith Erden, "Heat Assisted Magnetic Recording," Proceedings of the IEEE, Volume 96, No. 11: (November 2008): page 1,810. [36] Kryder et al: page 1,810.

Semiconductor Insights Gives Impressive Review for Micron’s NAND and DRAM Process Technology

Sun, 25 Jan 2009 23:26:15 -0800

Semiconductor Insights (SI), a leading technical advisor that provides in-depth technical review and patent analyses of integrated circuits and structures, recently reviewed two of Micron’s industry-leading process technology developments from 2008. Posted to its website, SI outlines its initial findings of Micron’s latest 50nm 1Gbit DDR2 SDRAM and Micron’s 32Gb 34nm NAND Flash. The company describes Micron’s 32Gb 34nm NAND Flash as having “the highest density (32Gbit) monolithic MLC NAND Flash that the NAND Flash industry has seen to date.” For Micron’s 50nm 1Gb DDR2 they state it has an “impressive die area,” and “features the most advanced Micron DRAM process technology Semiconductor Insights (SI) has analyzed to date.”