Micron Blogs - Events

Dean's List: ISC'13

Wed, 19 Jun 2013 14:05:00 -0700

Reporting to you (almost) live from this year’s International Supercomputing. Here are some highlights to date:

On this system Audi is demonstrating advanced 3D design. Note the label on the side of the rack!

The Bull X DLC blade featuring Micron DIMMs and C300 SSDs.

The Student Cluster Challenge: 3000W power budget HPC. Here's the Purdue team, complete with pizza!

And one final thought for now – I have been impressed by the number of companies selling liquid cooling solutions for HPC. (Hope your connection doesn't leak.)

This is one way to keep the machine running. Or you could increase the efficiency of your computer with an advanced memory technology like Hybrid Memory Cube. More on that later...

Micron Steps Up

Fri, 03 May 2013 10:21:00 -0700

Micron team members put on their walking shoes to join Boise Mayor Dave Bieter for the “Walk with the Mayor” challenge on Friday, May 3. For the city of Boise’s 2013 sesquicentennial celebration, the Mayor has pledged to walk 150 miles during the year with different organizations and groups in the community.

Micron is proud to support the Mayor’s Walk 150 challenge as it encourages team members and our community to add fitness to their lifestyles for better health.

Learn more on how the city of Boise is stepping up to the Mayor’s challenge.

Contemplating the Future of Computing

Tue, 30 Apr 2013 08:07:00 -0700

I spoke Friday at the IEEE Workshop on Microelectronics and Electron Devices (WMED) in Boise about a memory-centric vision for the future of computing. This was my first time at this workshop, and I was very impressed by two things: the high caliber of the talks and the fact that the workshop had strong representation from students at all levels. Coming from the high-performance computing community—which tends to be a somewhat more distinguished, somewhat greyer crowd—seeing a strong student presence was refreshing!

John Knickerbocker from IBM gave a particularly thought-provoking talk on the future of 2D, 2.5D, and 3D integration as ways of combining heterogeneously fabricated elements (logic, memory, MEMS, and other sensors, potentially silicon photonics). The kind of close proximity enabled by these methods is fundamentally critical to the future of computing. Proximity is one of the few ways to significantly decrease the energy required for communication between modules in a computer—which is the key factor in power consumption, regardless of a computer’s scale (mobile phone to supercomputer). With servers consuming up to 1.5% of the world’s power (see Growth in Data Center Electricity Use 2005 to 2010 [updated 2011]), this is a big deal.

Work in advanced technologies like processing-in-memory (PIM) is about performing computation in less energy than it takes to drag the data between a standard memory module and a processor module.

Another dominant and interrelated theme is the change in Moore’s Law that has occurred since 2003. Performance doesn’t simply come “for free” by waiting anymore, so we’re looking to new architectures for an overall improvement in end-user application performance. There was a lot of talk about potential new memory devices, but more than that, there was an air of opportunity about the creation of new architectures capable of addressing problems not well solved by today’s computers.

One repeated theme was human-cortex-inspired computers, which despite being slow, show tremendous 3D structure and interconnectedness. To paraphrase one speaker, they may not be able to diagonalize a matrix better than a von Neumann computer, but they have tremendous capabilities in pattern recognition and other extremely important large-scale data analytics.

The potential for enabling computing in the post Moore’s Law era is in solving the heterogeneous integration problem, which, in turn, enables us to less expensively explore the kinds of architectures capable of addressing workloads that have become more about exploring connections and patterns than traditional science calculations.

The human cerebral cortex is the ultimate example of this: Tens of billions of neurons, each of which has on the order of 50 degrees of freedom, which produce a whopping 6 bits of information. In terms of storage, this is less than a petabyte of information total, which is an achievable goal for silicon systems today using commodity NAND Flash storage. The complexity and power arises not in the raw storage of information, but in how that information is applied.

All in all—pretty heady stuff! Look for more highlights from future events…

IEEE Workshop Inspires Students, Industry Leaders

Tue, 23 Apr 2013 15:09:00 -0700

The recently held 2013 IEEE Workshop on Microelectronics and Electron Devices (WMED) proved that even those who shape the future of technology can learn from colleagues, educators and students.

With more than 400 attendees participating in different sessions, the workshop grew substantially in its eleventh year. Speakers from across the nation, including several team members from Micron congregated at Boise State University on April 12 to share their knowledge.

Members of the team who organized the event noted the “great, rejuvenating opportunity for engineers to spend the day learning cutting-edge material” and the ability to learn more about advancements within and outside of their fields.

Additionally, the Boise WMED is the only IEEE event that incorporates a high school student-focused program. University students are able to present their work, while high school students also participate in hands-on activities, developed and led this year by Micron Vice President of Memory System Development Dean Klein. This educational programming has drawn the attention of some IEEE leaders who hope to inspire other events to follow suit.

Reflecting the Micron Foundation’s focus, the IEEE workshop offered a unique opportunity to spark a passion for STEM subjects in students who attended. Students had unprecedented access to some of the brightest minds in technology and witnessed the breadth and depth of influence technology has in every aspect of our lives.

The workshop concluded with the Micron Research Symposium, which provided a forum for Micron’s technical leaders to address the faculty and research community at partner universities and highlight the challenges the memory industry is facing today and tomorrow. Researchers in attendance gained a better understanding of our industry, how they can participate in industry relevant research and strengthen existing partnerships.

Organizers recognized the wide range of support for the event from Micron and the Micron Foundation. From the Micron SSD team providing solid state drives for raffles to Dean Klein working with high school students to the Foundation helping increase attendance and university participation, the WMED had one of its strongest years in memory.

The HMC Consortium Sets a New Milestone

Wed, 03 Apr 2013 12:29:00 -0700

With the HMC Consortium’s first specification final and publicly available, the organization is meeting today to determine next steps for the 2013 working year. Basically, the group will be working on extending the SR PHY spec to reach a signaling rate up to 28 Gb/s and the ultra-short reach PHY to 15 Gb/s. The goal is to have a second-generation spec published by early 2014.

NVDIMMs—The Best of Both Worlds

Wed, 06 Feb 2013 14:01:00 -0800

The NVDIMM is a new “hybrid” memory module that combines the speed of DRAM with the nonvolatility of NAND Flash. NVDIMMs enable the content in DRAM to be saved into the NAND Flash based on a signal from the system. This signal could indicate power failure or any other event when you’d want DRAM content to move into the NAND, such as system checkpoints, data logging, saving metadata, etc.

NVDIMMs provide performance, cost, and data-security advantages for enterprise-class server and storage applications. They’re a spot-on solution for environments that need persistent DRAM capability for frequent access to big data.

AT SC12, Micron demonstrated the first version of our NVDIMM, a 4GB RDIMM with 8GB of Flash. We partnered with AgigA Techto supply the ultracap power source that backs up the DRAM in case of a power failure.

Check out our NVDIMM technology page to find out more about how NVDIMMs bridge the gap between DRAM and SSDs.

Dean’s List – Observations from CES 2013

Wed, 16 Jan 2013 11:02:00 -0800

3,100 exhibitors, 150,000 attendees and 100 breakfast-buffet options. What could it be but the 2013 Consumer Electronics Show, an event that surely must be the bane of every stiletto-heeled exhibitor and the boon of podiatrists worldwide? Last week I attended two days of this annual electronics mega-festival and had some time between meetings to catch the spirit of the event and take a peek at some of the promised technology. My feet may never be the same.

First general impression: this show was massive. In two days I could not really do it justice, so I focused on the Las Vegas Convention Center and nearby exhibits. The show was packed. There were many times when I felt more like a part of a herd than a hunter (a technology hunter, that is!). There were a few duds. Among all the rows and crowded booths I occasionally ran across a nearly empty booth. The USB Techzone was an entire area dedicated to no-shows, I guess.

Some of the technologies that caught my eye were OLED displays, 4K and 8K displays, Nvidia and Qualcomm processors and action cameras. Let me explain.

OLED displays. Organic light-emitting-diodes have been the hot, upcoming, display technology for at least three years at CES. This year there were 55” production units on display, and they were pretty impressive. (And pretty!) The colors are really rich on these displays. The screens can also be very thin, in part because they don’t need a backlight. Also very interesting were curved displays from at least three vendors. This works for OLEDs because the manufacturing process doesn’t need to have a flat substrate like a normal LCD panel. I can’t say that the curved displays are really that practical for TV applications, but for mobile applications these could be interesting. Certainly one of the more promising features of a curved OLED is that it might also be flexible, thus ending the era of cracked displays on dropped cell phones.
4K and 8K displays. Yes, you just upgraded your home TV to a 1080p high-definition beauty. Yes, you’ve upgraded your DVD player to a Blu-Ray® player so you can watch your favorite movies in high-definition glory. Yes, you are now officially out-of-date. 4K and 8K are the new ultra-high-definition TV standards that are going to try and get you to open your pocketbook and upgrade your TV again. These screens are truly impressive, and the detail is amazing. A 4K display has twice the resolution in each direction as your 1080p HD display. Correspondingly, an 8K display doubles each of these again. However, when looking at the Sony implementation, I noticed something very distracting. The content they were displaying had a very narrow depth-of-focus, which made most of the image deliberately out-of-focus—which seemed a bit counterproductive!

One implication for us is that with increased resolution comes a need for increased memory. The 4K display itself will require 4X the internal memory of today’s 1080p HD display. The 8K display will require 16X the memory of today’s 1080p display. Of course, the rest of the system that delivers content to these ultra HD displays needs more memory, too. How much? Probably about 40% more for 4K, because compression standards have improved. Going from 4K to 8K should be a bigger jump. Speaking of Blu-Ray…
Blu-Ray MIA. OK, I’ll admit it: I’ve never been a huge fan of Blu-Ray. Discs get scratched, smudged and cracked. Give me solid-state storage or streaming delivery! For three years now, I have watched portable and automotive disc players for any sign of Blu-Ray. This year even Sony admitted that their future is in content delivery from cell phones or tablets. Score one for NAND!
Application processors. Big and busy. That would describe the booths of Qualcomm and Nvidia. Qualcomm had just released their Snapdragon™ 800 app processor for tablets and cell phones, and it was generating quite a buzz. I don’t recall ever seeing so many people lined up to see a CES silicon demo where there wasn’t some freebie being given away. Nvidia was also showing some of their applications in the automotive arena, where touchscreens are replacing mechanical knobs and dials for dashboard applications.

But back in the Qualcomm booth, tucked away to the side, was a small area dedicated to showing off some of the projects of Qualcomm Labs, an advanced development team bringing cutting-edge technology to market. In past years, this has always been a secret treasure trove, so I make it a point to see what they are cooking up. This year it was shades of George Orwell, with their creation of a software development tool for applications that gives the application all sorts of context information. This context information can be gleaned from the user’s email, text messages, location, numbers dialed, and the like. This is, of course, not unlike what Google does, and as you might predict, the 20-something-year-old whippersnapper describing this to me saw nothing wrong with it. I guess I am truly from another generation.
Action cameras. One of the busiest booths I saw at the show was the GoPro booth. GoPro makes wearable, waterproof, high-definition sports cameras and accessories. But it wasn’t just GoPro that was busy. Some of their competitors were doing quite well, too. And if imitation is the sincerest form of flattery, GoPro must indeed be feeling flattered.
USB Flipperizer™. In the category of “Duh—why didn’t I think of that?” was the USB Flipperizer. This little gadget is a connector that you can plug onto your favorite USB widget, which then allows you to plug into your computer or other USB port either way. That’s right. There is now no right-side-up or -down. As a stand-alone product, it really is about as cheesy as its name, but interesting, anyway…

There really is so much I could continue on with, but let me leave you with a few closing thoughts. First, consumer electronics are alive and well. There is no shortage of innovation in this space, and it is these innovative devices that are enticing people worldwide to open their wallets and part with their euros, drachmas and dollars. Based on this show, it sure seems that the global economy is going to do just fine. Second, our digitization is complete, and it is demanding. Film and analog TV have long since been dead, but what we are seeing now is the explosion of precision digital data. Higher-resolution TVs, knob-free dashboards on self-driving cars, higher-resolution and faster-frame-rate sports cameras, context-aware applications—all of these are just the tip of the iceberg on top of the hidden mountain of digital data that makes it all happen. In the memory world, we can all sleep easier knowing that the demand for memory to move, manipulate, manage, and store this mountain of data is continuing to grow faster than we can imagine.

SC12: Dean's List

Thu, 15 Nov 2012 12:39:00 -0800

Just back from SC12, the huge show highlighting huge computers capable of tackling huge problems while ringing up huge power bills. There, you have the highlights in a nutshell! :) Compared to shows like the Consumer Electronics Show, SC12 isn’t really that big. But the event filled up most of Salt Lake City’s “Salt Palace” convention center which showed that “Big Iron” scientific computing is alive and well and definitely has a lot of interest. The show featured numerous speakers (including our own Todd Farrell), discussion forums and a huge exhibition floor. I spent some time on the exhibition floor and came away with these observations:

Memory is still a hot topic for HPC (High Performance Computing). There was, as always, a lot of hardware on display at the show. The importance of memory could easily be seen in the makeup of the hardware. On most systems the CPU was easily identified, and for each CPU chip on the board there was a corresponding set of DIMM modules loaded up with memory. In most cases there were 8 DIMM modules per CPU and in all cases the modules were buffered modules. In the presentations and in talking with engineers, the topics of memory density and energy are still most concerning. Below are a couple pictures of some of the systems.


Figure 1: AMD CPU with Micron memory	Figure 2: Fujitsu with Micron memory

GPU’s are hot. There was a new Top500 list released on Monday at SC12. The reigning Top500 machine, Lawrence Livermore’s IBM BlueGene-Q “Sequoia” was dethroned by the newly-upgraded Oak Ridge National Labs “Titan” Supercomputer. Titan is a Cray XK7 and features more than 260,000 Nvidia Kepler GPU accelerators for a total of over 560,000 processors. Thank goodness they can draw power from the Tennessee Valley Authority! Titan’s new speed record was 16.6 Petaflops, which means a little under 17 million billion floating point operations per second. A big number.
Intel is taking HPC seriously. Cray, a longtime AMD fan, was showing off a new machine based on Intel Xeon E5 processors. I queried them about deployment of the new hardware and they told me to wait and see. But besides having replaced AMD, there were other signs of Intel’s interest in this space. There are now two Intel Xeon E5-based systems on the Top500 list. The new number 7 is perhaps the most interesting as it is made up of Dell PowerEdge servers with the hot new Intel Xeon Phi accelerator boards installed. Xeon Phi isn’t really a typical CPU in the Intel family of CPU’s. This is the chip formerly known as MIC (Many Intel Core) or alternatively as Knight’s Corner. This chip is a peripheral to a server CPU and incorporates 60 X86 processor cores and support circuitry. Oh yes, these chips have a set of memory controllers, too. You might view the Xeon Phi as Intel’s answer to the GPU: A peripheral to the main CPU that is good for crunching numbers. But perhaps Phi is good for other things as well. For this we’ll have to wait and see. Below is a picture of Cray’s new board with Intel Xeon E5 processors.

Figure 3

AMD is suffering in HPC (see Figure #3). AMD has been a longtime favorite of the supercomputing community. AMD was first to address the “memory wall” when they introduced processors with memory controllers built in. With Hyperchannel, AMD had a solution to allow scaling to greater numbers of CPU chips in a system. For supercomputers that needed epic amounts of address space, AMD was first with a 64-bit instruction set. If “imitation is the sincerest form of flattery” (credit: Charles Colton), AMD must be truly flattered. Well, now it appears they are about to be flattened. With the Intel juggernaut focused on this space AMD will find the going to get tougher. Hot off the press: AMD is apparently shopping around for a buyer. Not a good sign.
But, watch this space. ARM is coming! Here’s the wild card. Could it be that Intel’s reign in supercomputers will ultimately be threatened by the lowly CPU core that has made smartphone smart? It’s no secret that some of the biggest names in servers are fielding “micro-servers” based on ARM CPU technology. So far, these systems have used 32-bit ARM cores, which severely limits the upward mobility of these servers. ARM has now introduced their 64-bit IP cores and that means 64-bit server-capable chips won’t be far behind. One of the major (but little) players in ARM-base server chips is Calxeda, who is one of the companies working fast and furious to bring 64-bit ARM to the server masses. ARM is attractive in this space due to the same reason it was a winner in cell phones: Energy. Low energy is very important in the supercomputer and server space. Energy is a major component of the total cost of ownership for these machines. Consider that a large datacenter can consume upwards of 20MW per year, and each MW can cost over $1M and you can see why energy matters.

Some final thoughts:

I like GPU’s as much as anyone, but frankly, I’m concerned with the results I see. Sure, the GPU-equipped Titan offers impressive performance, but it does so with increased energy consumption. If we look at the performance gain over the previous #1 (Lawrence Livermore’s “Sequoia”), the gain is less than 8% in performance at a 4% increase in power consumption. Clearly this is not a trajectory that’s going to get us to a viable Exascale-class supercomputer with a viable energy bill. Exascale machines are supposed to be capable of a billion-billion floating point operations per second with a power consumption of under 20MW. We need bigger improvements in performance and power. One additional concern on GPUs: Not a single GPU-based system showed up on the Graph500 list. What does this mean? Many experts consider the Graph500 benchmark to be more representative of most real-life applications. The Top500 benchmark is Linpack, which is very floating-point intensive. What type of system do you want to run your datacenter? Unless you’re computing fluid dynamics, climate simulations or protecting a nuclear stockpile you might want to go for the Graph machine. Of course, this does make me wonder about the pursuit of Exascale floating-point performance…

If you looked carefully you would see that many of the Intel-based supercomputers use Intel’s Xeon E5 instead of the Xeon E7 processors. The E7 is the higher performance part, Intel’s flagship CPU, yet these machines are using E5 processors. I asked two different companies why their systems didn’t use the E7 and I received the same answer from both: price. So while performance is paramount in these systems, price is more important. How much of a price delta are we talking about here? Intel publishes the single-unit list price of their processors and if I compare a Xeon E7-8860 to a Xeon E5-4610 I see list prices of $4016 and $1219, respectively. (Other part numbers can have larger or smaller deltas.) Maybe there’s something more subtle here than what we see in just the price. The lower-rated E5 processor actually has higher CPU-CPU bandwidth than the E7. Both CPU’s can control over 1TB of memory, but the memory frequency (and thus bandwidth) is 25% faster for the E5. I’ll leave you with this closing thought: It’s about the memory. :)

Dean

ISC12: insideHPC at the Micron Booth

Mon, 02 Jul 2012 11:08:00 -0700

A week after ISC’12 and the buzz continues! Last Wednesday, after my session on Large Memory, Rick Brueckner from insideHPC caught up with me in the ISC Exhibition Hall at the Micron booth. Obviously, insideHPC tracks the top trends in the High Performance Computing space, so it was natural that they should come to a memory company to talk trends. When looking around the exhibition hall there were a lot of high performance systems on display and most of them had their lids off and were showing off the silicon inside.

One recurring theme in all the different systems was that these systems are chock full of memory modules. Rich asked me a few questions about these modules and what Micron does in this space. So it was a good time and place to talk about DDR3, the new load-reduced DIMMs, upcoming DDR4 and HMC. Then Rich asked me about storage. This turned out to be convenient, since we were standing right in front of our enterprise storage display. I pointed out the enterprise MLC SSDs, the high performance SLC SSDs and the PCIe SSDs (always a favorite!) We’re uniquely positioned providing the range of memory and storage solutions for this HPC market and I think Rich was pretty excited to learn a bit more about Micron. The next morning I was sad to leave Hamburg. Next year’s ISC’13 will be in Leipzig, and I may never return to the beautiful city at the mouth of the Elbe river. But I had four more cities to visit on my European trip, so auf Wiedersehen, Hamburg!

ISC12: The Future of Supercomputing

Mon, 25 Jun 2012 12:33:00 -0700

In Friday’s blog post, we talked about how the U.S. recaptured the Top500 supercomputing lead with the IBM-Lawrence Livermore system named Sequoia. But Fujitsu, creator of last year’s top supercomputer, K, hasn’t been standing still in this department. The K supercomputer at the RIKEN Advanced Institute for Computational Science in Kobe, Japan turns in a respectable Linpack score of 10.5 petaflops and a computational efficiency of more than 93%.

I stopped to chat with the Fujitsu team about their next step and was pleased to see another system chock-full of Micron memory. What they showed me was their next-generation node card, called the FX10. This board doubles the cores per CPU chip from the FX9 that was used in K. They hinted that there is a new machine coming based on FX9 that they expect to retake the lead with.

Some of you may recall that I’ve mentioned GPU-based computing for supercomputers in the past. There was a lot of talk about GPU computing here again. I even sat through an Nvidia presentation where they claimed to be the energy-efficiency leader, showing energy figures that were higher than the IBM BlueGene-Q. It’s also worth noting that this year’s Top500 list has more GPUs than last year, but the number in the top 10 has gone from three to two. Of course this will change either later this year or early next year, when the Oak Ridge National Laboratory’s Jaguar supercomputer gets through its upgrade with its Nvidia 2090 GPUs.

One other interesting metric to note is that the computational efficiency (Rmax/Rpeak) for the GPU-based machines is a lot lower than other supercomputers, with scores of around 50%. Don’t get me wrong; I’m not down on the GPUs, but they have some hurdles to overcome if they are going to be the viable path to exascale (10^18 FLOPS). My hypothesis is that they may be able to improve with better programming tools, but also that they could use better access to high-speed memory. I chaired an ISC session called “Large Memory Systems and Challenges.” In my introductory comments, I focused on the economics of memory and the opportunity of memory. My three speakers were Shawn Strande from the University of California–San Diego, Dr. Bruce Jacob from the University of Maryland, and Dr. Richard Murphy from Sandia National Laboratories. Shawn is the project manager for the Gordon supercomputer, a machine that is unique in its incorporation of Flash memory. Gordon is called a “data-intensive supercomputer.” Dr. Jacob is no stranger to Micron; he’s an expert on memory performance and system modeling. Dr. Murphy discussed the applications view of memory. Both Dr. Jacob and Dr. Murphy pointed to the Hybrid Memory Cube as a necessary ingredient in future high-performance computing. Well, it’s been a great show and a great place to connect with some of the thought leaders in the high- performance computing space. But now I’m off to England—so long, Hamburg!

ISC12: Clocking Sequoia, the World's #1 Supercomputer

Fri, 22 Jun 2012 11:49:00 -0700

In yesterday’s post, I promised to dish on what I learned about the new #1 Top500 supercomputer, Sequoia, from the IBM and Lawrence Livermore National Labs folks who built it. Sequoia is built around IBM’s Power6 CPU and BlueGene-Q architecture. This CPU has 18 cores on a chip, with one core dedicated to running Linux, one core for a spare, and 16 cores dedicated for computation. The CPUs are clocked at a conservative 1.6 GHz and are water-cooled. The CPUs are assembled onto a module that contains one other significant feature—72 DDR3 memory devices. Most notable for me was that these were Micron memory devices. According to IBM, the aggregate bandwidth of the CPU chip clocks in at just over 42 GB/s. The CPU heat sink extends over the memory on one side of the module, providing water cooling for the memory, too. IBM says the machine is 90% water-cooled and 10% air-cooled, which makes the machine pretty quiet, unlike most servers. Nice! (Or cool!) Besides taking the performance crown, IBM is also claiming the energy-efficiency lead with the BlueGene-Q architecture. My calculations show Sequoia to be a “modest” 0.483 watts per floating point operation (FLOP), which is less than half that of the Japanese K Computer that held the top ranking in 2011. Sequoia’s combined 1.5+ million cores(!) and 1.6 million gigabytes (1.6 petabytes) churn out a peak performance of over 20 petaflops (20x10^15 PFLOPS) and a Linpack benchmark score of over 16 petaflops. That nets out to a computational efficiency of about 80%, a good score. IBM claims this architecture can scale to 100 PFLOPS (peak), but could anyone afford the 40MW power bill? It is worthwhile to note that there are now four IBM BlueGene-Q supercomputers in the top 10 of the Top500 list (#1, #3, #7, and #8). A very impressive showing for IBM! Stay tuned for the next blog post to find out about Fujitsu’s supercomputing efforts, plus the latest on future supercomputing technologies.

ISC12: Supercomputing Takes Center Stage

Thu, 21 Jun 2012 13:46:00 -0700

Much to report on from ISC12 in Hamburg, Germany. The weather’s been good, and the food is… German, which means good and rich! But the memory here is what’s really impressive. This is a supercomputer show, and while the CPU and GPU vendors are all bragging about their latest advances, the role of memory in these impressive machines cannot be underestimated. The new Top500 supercomputer list was announced earlier this week. The Fujitsu-designed K supercomputer has enjoyed a year on the top of the heap, but the new king of the hill is the IBM-built Sequoia supercomputer, just brought online at Lawrence Livermore National Labs in California. I spent some time with the folks from Lawrence Livermore and IBM digging into this supercomputing solution—stay tuned for tomorrow’s blog post to find out what I learned!

Check out Micron's Events page for more information about ISC12.

From the Embedded Systems Conference in Boston

Wed, 28 Sep 2011 15:58:00 -0700

Micron's Vice President of Embedded Solutions, Tom Eby, delivered his keynote address this morning, saying embedded memory is poised for exponential growth...and that Micron is poised to take advantage of that.

"It's estimated that 40 exabytes of unique new information will be generated worldwide this year," said Eby. "That's more than in the previous 5,000 years ... combined!"

Eby broke down trends affecting memory growth into three main categories...the three Cs: consume, connect and capture.

* Consume: Eby used examples of tablets, automotive infotainment, and televisions to illustrate how more and more data is being consumed.

* Connect: Eby characterized the internet of things as the next wave of connected devices ranging from household appliances to smart meters, all needing more memory. Eby also said that cloud computing will compliment, not compete with memory growth in devices and the data center.

* Capture: For this trend, Eby showed what he calls the "ultimate capture app," using the example of a gigapan image taken by David Bergman at President Obama's inauguration. It's comprised of 220 images and the final image size is 59,783 X 24,658 pixels or 1.47 gigapixels. See it here.

Glen Hawk Interview from FMS

Fri, 19 Aug 2011 10:48:00 -0700

I had a chance to sit down with Glen Hawk—our VP of NAND solutions—at this year’s Flash Memory Summit to talk about the conference and his keynote there. He had a lot to share about the growth of NAND, it’s place in a cloud-computing world, and where the technology is headed. His keynote also featured some great vignettes with several Micron customers who are using NAND in interesting new ways. If you weren’t one of the thousand who got to see the keynote in person, the video interview below should give you a good summary.

It's Time for the Flash Memory Summit!

Wed, 10 Aug 2011 10:43:00 -0700

I’m at the Flash Memory Summit in Santa Clara, California where final preparations are underway on the tradeshow floor. We're a long-time participant in the Summit and are really excited for the opportunity to speak and meet with our partners and peers in the industry.

On Tuesday, Micron’s Vice President of NAND Solutions Group, Glen Hawk, gave a keynote address to an overflowing crowd of nearly 1,000 tech industry enthusiasts. In his speech on the “Alchemy of NAND Flash” Hawk highlighted Micron’s leadership in cutting-edge technology and his optimism about our ability to scale the infamous memory wall.

“At Micron we plan on jumping right over the wall. We’re confident in the future because we’re making [the future],” said Glen Hawk.

Along with Hawk’s keynote address, Micron is engaged in 20 speaking opportunities over the duration of the three-day conference. Session topics range from Solid State Drives (SSDs) to NAND Interface Solutions and to The Future of Phase Change Memory. Stay tuned for next week’s blog post featuring my interview with Micron’s Vice President of NAND Solutions, Glenn Hawk.

Micron Helps Support Boise’s Ironman

Wed, 15 Jun 2011 04:48:00 -0700

More than 1,200 triathlon athletes from around the world competed in Boise's Ironman 70.3 on Saturday, June 11, where a portion of the bike course raced through Micron's campus. The Micron Foundation would like to thank the Micron team members who volunteered their time to help enrich our community by supporting the competition the day of the event, as well as the additional facilities, security, legal and risk management team members that made this event possible.

Micron Foundation and Volunteers help Paint the Town

Wed, 15 Jun 2011 01:12:00 -0700

The Micron Foundation is pleased to announce that more than 20 team members volunteered their time and energy Saturday, June 11 to help Paint the Town for the Boise event. The volunteers are continuing to enrich the community by putting in effort to help paint and fix up a home of senior and disabled homeowners who are no longer able to maintain their homes.

Enriching the Community: Micron team members donate to the Idaho Foodbank

Thu, 18 Nov 2010 07:38:00 -0800

On behalf of the generous team members who donated their holiday gift, the Micron Foundation and a handful of Micron team members stopped by the Idaho Foodbank on Thursday, Nov. 18 to deliver 1,469 turkeys and 182 hams (~ 10 tons of meat!).

The Micron Foundation and Micron team members are pleased to enrich the community by helping to fight hunger this holiday season.

Choosing the Right Enterprise SSD

Mon, 18 Oct 2010 08:45:00 -0700

We just concluded a busy few days at the fall Storage Networking World in Dallas. Not surprisingly, a lot of the discussions centered on doing more with less. Nearly everyone is interested in what SSDs could do for their enterprise, but they’re cautious too, and not sure they know enough about this new technology to choose the best SSD for their application. So how do you know which SSD will work best for you? Unfortunately, it’s not such a simple question. All SSDs are not created equal, and you can’t rely solely on the quoted specs to tell them apart. If you do that, you’re setting yourself up for disappointment. Quoted specs are typically based on fresh-out-of-box (FOB) performance—the best performance the drive will ever achieve. Instead, you should look at steady state performance—the level the drive achieves once it fills to the point where write performance varies little over a relatively long period. Often, it’s at a significantly different level than the FOB performance numbers.

Why the difference? As the drive begins to fill, performance is impacted by a SSD phenomenon called write amplification—a multiplying effect that results from having to rewrite user data on the SSD. Inefficient garbage collection and wear leveling algorithms can further increase the write amplification of a SSD. You can compare the steady-state performance differences between our enterprise P300 drive and competitors in the benchmarks we posted back in August. Steady state performance is an important matter that deserves more attention and education. That’s why one of my colleagues devoted much of his time here at SNW to conduct a hands-on lab that demonstrated how to set up an Iometer test that showed significant differences between the steady-state results of client and enterprise SSDs. We believe that the more people know about the specifics of SSD performance, the better the likelihood that they’ll make an educated choice and be pleased with the results they get. We’re working on a whitepaper that explains more about the technical details behind SSD performance states.

If you’d like to be on our mailing list when it comes out, sign up for a micron.com account (be sure to select an interest in SSDs).

Excerpts from Micron’s Keynote at Flash Memory Summit

Tue, 07 Sep 2010 13:06:00 -0700

For those of you that didn’t attend the 2010 Flash Memory Summit, we grabbed a few excerpts from a keynote given by Ed Doller—Micron’s Vice President & Chief Memory System Architect—and created a highlight reel. Take a look at the video to learn some of the reasons why 2010-2020 is the decade of flash memory, and why, as Ed puts it, “It’s Gigabytes, not Gigahertz.” As always, drop us a line if you have any questions or comments.

Updates from the Flash Memory Summit

Wed, 18 Aug 2010 20:10:00 -0700

The 2010 Flash Memory Summit has been a great show—lots of attendees and new innovations in flash (remember our post from yesterday?). For those of you who couldn't make it, we pulled together a quick video summary of what's going on in the Micron booth.

A look inside the Flash Memory Summit '09

Thu, 13 Aug 2009 09:01:00 -0700

Micron’s Kevin Kilbuck, director of strategic NAND marketing talks about the hottest buzz happening at this year’s FMS. It’s been a lively show this year, with an interesting debate about bringing high-quality NAND to enterprise applications, as well as a big announcement from us and Intel on 3-bit-per-cell MLC NAND technology. Let us know what you think about our interview with Kevin, and be sure to stay tuned for future news and updates.

Micron-supported teams advance to robotics championship

Tue, 15 Apr 2008 07:12:00 -0700

Micron mentors will join high school teams from Idaho and Virginia in the 2008 FIRST Robotics national championships in Atlanta, Ga., April 17-19. The "Tater Bots" robot from Dehryl Dennis Professional Technical Center in Idaho and the "Robocats" robot from Battlefield High School in Virginia are two of the 500 entries competing on six fields in the Georgia Dome for the annual engineering competition's grand prize.

The FIRST ("For Inspiration and Recognition of Science and Technology") Robotics competition is a nationwide program of 37,000 students on 1,500 teams. High school students and their volunteer mentors are tasked with building a robot that must compete against other robots in a series of competitive challenges. The program helps students develop a strong work ethic and the skills necessary to pursue a career in engineering, while also doing something students and mentors enjoy. Each year, the Micron Foundation sponsors FIRST Robotics teams as part of its mission to develop programs that promote math, science and engineering education and support activities in the communities where Micron team members live and work.

Micron to Participate in Green Tech Panel, Wednesday April 16

Fri, 11 Apr 2008 07:18:00 -0700

Talking about the innovations in energy-efficient memory, Dean Klein, Micron’s Vice President of Memory System Development will be participating in a “Green Tech” panel at the Embedded Systems Conference in San Jose on Wednesday, April 16. During the panel, Klein will discuss the trends in green technology design and will highlight Micron’s work in developing energy-efficient memory technology.

Aptina Has Eyes for You – and On You

Fri, 04 Apr 2008 04:22:00 -0700

This week at the International Security Conference (ISC) West in Las Vegas, Aptina is busy touting its CMOS imaging security sensors. Last week the company announced a joint partnership with Texas Instruments to build a security IP network camera reference design, allowing security system designers to offer cameras with improved image quality and functionality at affordable prices.

And this week, the company announced a new high-dynamic range security sensor, which is important for capturing clear images and video in high-contrast lighting conditions. Often, security cameras are placed in uncompromising locations – such as ATMs, bank lobbies and parking facilities – that cast both dark shadows and bright sunlight, creating a difficult environment for clearly capturing an identified scene or target. Aptina’s new sensor featuring HDR allows a camera to capture crisp images and video by separating the bright background from the darker foreground through a controlled exposure method.

According to Curtis Stith, Director of New Markets for Aptina, “The rapidly growing market for security and surveillance cameras is fueling the need for increasing levels of image quality and functionality at affordable prices.”

There's a Behind-the-Scenes Star at CES...

Tue, 08 Jan 2008 05:20:00 -0800

Of course, everyone has their eyes set on CES in Las Vegas this week, as the industry turns its attention to the annual consumer electronics show gathering. And CES always brings out a list of stars, some A, some B and some, well, time has wondered where they've been. This year's list of star attendees includes Chuck D from Public Enemy, Mad Mike from MTV's Pimp My Ride and even Lucy Lawless from Xena.

But there's another star quietly working behind the scenes of the latest consumer gadgets and devices being shown off at CES. That star's name is NAND. As in NAND flash memory, and the technology is doing its best impression of The Little Engine That Could as it humbly does its thing in so many of the devices being shown off at CES, including the latest advances in digital camcorders, digital music players, solid state drives and more. In fact, NAND-based SSDs have been all the rage at CES, with various companies announcing their products and plans for SSDs. The online outlet TG Daily even called SSDs "the new black" because of the buzz at the show. Of course, Micron uncorked its SSD product plans in November with its RealSSD family of products. With its expertise in NAND, Micron is set to bring this star to the center stage in its line of RealSSD solid state drives.

Game on! Future Engineers Compete in Robotics Challenge

Fri, 04 Jan 2008 01:01:00 -0800

This Saturday marks the official kick-off of the FIRST Robotics Competition. Over the next six weeks, more than 1,500 teams made up of over 37,000 high-school students and numerous mentors will accept a challenge to build a robot using a common kit of parts and set of rules.

The competition helps students discover the rewarding fields of science, technology, engineering and math. According to a recent, independent survey posted on the competition Web site, FIRST students are more than three times as likely to major specifically in engineering and more than twice as likely to expect to pursue a career in science and technology.

Good luck to the following teams sponsored and / or supported by Micron in 2008:

Team Tator, Dehryl Dennis Professional Technical Center, serves Boise, Meridian, Kuna school districts, as well as private schools, in Idaho.
Bullbots, Mountain View High School, Meridian, Idaho.
NASKO, serves Nampa, Skyview and Columbia High Schools in Nampa, Idaho.
Robocats, Battlefield High School, Haymarket, Va.
Team 2068 Metal Jackets, Osbourn Park High School, Manassas, Va.
Aquila Squadron, Osbourn High School, Manassas, Va.

Interested in participating in one of the Idaho kick-offs? Join students, parents, mentors and Micron at the 2008 Treasure Valley FIRST Kick-off Event, Saturday, Jan. 5, 7:30 a.m. at the Boise State University Micron Engineering Center.