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Micron Blog

ISC12: The Future of Supercomputing

In Friday’s blog post, we talked about how the U.S. recaptured the Top500 supercomputing lead with the IBM-Lawrence Livermore system named Sequoia. But Fujitsu, creator of last year’s top supercomputer, K, hasn’t been standing still in this department. The K supercomputer at the RIKEN Advanced Institute for Computational Science in Kobe, Japan turns in a respectable Linpack score of 10.5 petaflops and a computational efficiency of more than 93%.

I stopped to chat with the Fujitsu team about their next step and was pleased to see another system chock-full of Micron memory. What they showed me was their next-generation node card, called the FX10. This board doubles the cores per CPU chip from the FX9 that was used in K. They hinted that there is a new machine coming based on FX9 that they expect to retake the lead with.

Some of you may recall that I’ve mentioned GPU-based computing for supercomputers in the past. There was a lot of talk about GPU computing here again. I even sat through an Nvidia presentation where they claimed to be the energy-efficiency leader, showing energy figures that were higher than the IBM BlueGene-Q. It’s also worth noting that this year’s Top500 list has more GPUs than last year, but the number in the top 10 has gone from three to two. Of course this will change either later this year or early next year, when the Oak Ridge National Laboratory’s Jaguar supercomputer gets through its upgrade with its Nvidia 2090 GPUs.

One other interesting metric to note is that the computational efficiency (Rmax/Rpeak) for the GPU-based machines is a lot lower than other supercomputers, with scores of around 50%. Don’t get me wrong; I’m not down on the GPUs, but they have some hurdles to overcome if they are going to be the viable path to exascale (10^18 FLOPS). My hypothesis is that they may be able to improve with better programming tools, but also that they could use better access to high-speed memory. I chaired an ISC session called “Large Memory Systems and Challenges.” In my introductory comments, I focused on the economics of memory and the opportunity of memory. My three speakers were Shawn Strande from the University of California–San Diego, Dr. Bruce Jacob from the University of Maryland, and Dr. Richard Murphy from Sandia National Laboratories. Shawn is the project manager for the Gordon supercomputer, a machine that is unique in its incorporation of Flash memory. Gordon is called a “data-intensive supercomputer.” Dr. Jacob is no stranger to Micron; he’s an expert on memory performance and system modeling. Dr. Murphy discussed the applications view of memory. Both Dr. Jacob and Dr. Murphy pointed to the Hybrid Memory Cube as a necessary ingredient in future high-performance computing. Well, it’s been a great show and a great place to connect with some of the thought leaders in the high- performance computing space. But now I’m off to England—so long, Hamburg!

About Our Blogger

Dean Klein
Vice President of Memory System Development

Dean Klein is Vice President of Memory System Development at Micron Technology. Mr. Klein joined Micron in January 1999, after having held several leadership positions at Micron Electronics, Inc., including Executive Vice President of Product Development and Chief Technical Officer. He also co-founded and served as President of PC Tech, Inc., previously a wholly-owned subsidiary of Micron Electronics, Inc., from its inception in 1984. Mr. Klein’s current responsibilities as Vice President of Memory System Development focus on developing memory technologies and capabilities.

Mr. Klein earned a Bachelor of Science degree in electrical engineering and a Master of Electrical Engineering from the University of Minnesota, and he holds over 220 patents in the areas of computer architecture and electrical engineering. He has a passion for math and science education and is a mentor to the FIRST Robotics team (www.USFIRST.org) in the Meridian, Idaho school district.

Tags: HMC

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